Hello Aaron Durbin, Arthur Heymans, Aamir Bohra, Duncan Laurie, V Sowmya, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34805
to look at the new patch set (#10).
Change subject: arch/x86: Add postcar_frame_setup_top_of_dram_usage() API
......................................................................
arch/x86: Add postcar_frame_setup_top_of_dram_usage() API
This patch adds new API for intermediate caching top_of_ram
and setting up required MTRR for next stage.
Change-Id: Iddafb573afb4799de64754a94816d7f3f2f4982f
Signed-off-by: Subrata Banik subrata.banik@intel.com
---
M src/arch/x86/include/arch/romstage.h
M src/arch/x86/postcar_loader.c
2 files changed, 40 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/34805/10
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iddafb573afb4799de64754a94816d7f3f2f4982f
Gerrit-Change-Number: 34805
Gerrit-PatchSet: 10
Gerrit-Owner: Subrata Banik
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Gerrit-Reviewer: Aamir Bohra
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Gerrit-Reviewer: Aaron Durbin
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Gerrit-Reviewer: Arthur Heymans
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Gerrit-Reviewer: Duncan Laurie
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Gerrit-Reviewer: Furquan Shaikh
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Gerrit-Reviewer: Subrata Banik
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Gerrit-Reviewer: V Sowmya
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Gerrit-Reviewer: build bot (Jenkins)
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Gerrit-CC: Patrick Rudolph
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Gerrit-CC: Patrick Rudolph
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Gerrit-CC: Paul Menzel
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Gerrit-MessageType: newpatchset