Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69690 )
Change subject: soc/qualcomm/sc7280: Skip PCIe ops for eMMC SKUs ......................................................................
soc/qualcomm/sc7280: Skip PCIe ops for eMMC SKUs
On Herobrine, we will determine if we have an NVMe device based on SKU id. Basically, if bit 0 is 2 (or Z), then we know that we have an NVMe device and thus will need to go through PCIe initialization. Otherwise, we know that we are booting an eMMC device.
Change-Id: I1fa0ad392ba6320fdbab54b3b5dc83ac28cd20ba Signed-off-by: Shelley Chen shchen@google.com --- M src/soc/qualcomm/common/pcie_common.c M src/soc/qualcomm/sc7280/soc.c 2 files changed, 24 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/69690/1
diff --git a/src/soc/qualcomm/common/pcie_common.c b/src/soc/qualcomm/common/pcie_common.c index 2f53e28..2925466 100644 --- a/src/soc/qualcomm/common/pcie_common.c +++ b/src/soc/qualcomm/common/pcie_common.c @@ -416,6 +416,9 @@ */ enum cb_err fill_lb_pcie(struct lb_pcie *pcie) { + if (!mainboard_needs_pcie_init()) + return CB_ERR; + pcie_cntlr_cfg_t *pcierc = qcom_pcie_cfg.cntlr_cfg; pcie->ctrl_base = (uintptr_t)pcierc->dbi_base; return CB_SUCCESS; diff --git a/src/soc/qualcomm/sc7280/soc.c b/src/soc/qualcomm/sc7280/soc.c index dc5a9b0..268f080 100644 --- a/src/soc/qualcomm/sc7280/soc.c +++ b/src/soc/qualcomm/sc7280/soc.c @@ -43,9 +43,12 @@ static void enable_soc_dev(struct device *dev) { /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) - dev->ops = &pci_domain_ops; - else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) + if (dev->path.type == DEVICE_PATH_DOMAIN) { + if (mainboard_needs_pcie_init()) + dev->ops = &pci_domain_ops; + else + printk(BIOS_DEBUG, "Skip setting PCIe ops\n"); + } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) dev->ops = &soc_ops; }