Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28706
Change subject: mb/lowrisc: Remove the Nexys4DDR port ......................................................................
mb/lowrisc: Remove the Nexys4DDR port
This board doesn't support the newest RISC-V Privileged Architecture spec (1.10), and it's based on an FPGA so it's a moving target.
Now that there's actual RISC-V silicon out there (from SiFive), mb/lowrisc/nexys4ddr will only continue to bitrot.
Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d Signed-off-by: Jonathan Neuschäfer j.neuschaefer@gmx.net --- M MAINTAINERS D src/mainboard/lowrisc/Kconfig D src/mainboard/lowrisc/Kconfig.name D src/mainboard/lowrisc/nexys4ddr/Kconfig D src/mainboard/lowrisc/nexys4ddr/Kconfig.name D src/mainboard/lowrisc/nexys4ddr/Makefile.inc D src/mainboard/lowrisc/nexys4ddr/board_info.txt D src/mainboard/lowrisc/nexys4ddr/devicetree.cb D src/mainboard/lowrisc/nexys4ddr/mainboard.c D src/mainboard/lowrisc/nexys4ddr/memlayout.ld D src/mainboard/lowrisc/nexys4ddr/rom_media.c D src/mainboard/lowrisc/nexys4ddr/romstage.c D src/mainboard/lowrisc/nexys4ddr/uart.c D src/soc/lowrisc/Kconfig D src/soc/lowrisc/lowrisc/Kconfig D src/soc/lowrisc/lowrisc/Makefile.inc D src/soc/lowrisc/lowrisc/cbmem.c M util/release/genrelnotes 18 files changed, 1 insertion(+), 322 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/28706/1
diff --git a/MAINTAINERS b/MAINTAINERS index ca8a6f2..4d27129 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -124,10 +124,8 @@ M: Jonathan Neuschäfer j.neuschaefer@gmx.net S: Maintained F: src/arch/riscv/ -F: src/soc/lowrisc F: src/soc/ucb/ F: src/mainboard/emulation/*-riscv/ -F: src/mainboard/lowrisc
POWER8 ARCHITECTURE M: Ronald Minnich rminnich@gmail.com diff --git a/src/mainboard/lowrisc/Kconfig b/src/mainboard/lowrisc/Kconfig deleted file mode 100644 index ba0fbe7..0000000 --- a/src/mainboard/lowrisc/Kconfig +++ /dev/null @@ -1,16 +0,0 @@ -if VENDOR_LOWRISC - -choice - prompt "Mainboard model" - -source "src/mainboard/lowrisc/*/Kconfig.name" - -endchoice - -source "src/mainboard/lowrisc/*/Kconfig" - -config MAINBOARD_VENDOR - string - default "lowrisc" - -endif # VENDOR_LOWRISC diff --git a/src/mainboard/lowrisc/Kconfig.name b/src/mainboard/lowrisc/Kconfig.name deleted file mode 100644 index 4c992fc..0000000 --- a/src/mainboard/lowrisc/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config VENDOR_LOWRISC - bool "lowrisc" diff --git a/src/mainboard/lowrisc/nexys4ddr/Kconfig b/src/mainboard/lowrisc/nexys4ddr/Kconfig deleted file mode 100644 index 5a6bfb2..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/Kconfig +++ /dev/null @@ -1,37 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -if BOARD_LOWRISC_NEXYS4DDR - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select SOC_LOWRISC_LOWRISC - select BOARD_ROMSIZE_KB_4096 - select DRIVERS_UART_8250MEM - select BOOT_DEVICE_NOT_SPI_FLASH - select UART_OVERRIDE_REFCLK - -config MAINBOARD_DIR - string - default lowrisc/nexys4ddr - -config MAINBOARD_PART_NUMBER - string - default "LOWRISC NEXYS4DDR" - -config MAX_CPUS - int - default 1 - -endif # BOARD_LOWRISC_NEXYS4DDR diff --git a/src/mainboard/lowrisc/nexys4ddr/Kconfig.name b/src/mainboard/lowrisc/nexys4ddr/Kconfig.name deleted file mode 100644 index f99b3cc..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_LOWRISC_NEXYS4DDR - bool "nexys4ddr" diff --git a/src/mainboard/lowrisc/nexys4ddr/Makefile.inc b/src/mainboard/lowrisc/nexys4ddr/Makefile.inc deleted file mode 100644 index abd341c..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/Makefile.inc +++ /dev/null @@ -1,25 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -bootblock-y += uart.c -bootblock-y += rom_media.c -romstage-y += romstage.c -romstage-y += uart.c -romstage-y += rom_media.c -ramstage-y += uart.c -ramstage-y += rom_media.c - -bootblock-y += memlayout.ld -romstage-y += memlayout.ld -ramstage-y += memlayout.ld diff --git a/src/mainboard/lowrisc/nexys4ddr/board_info.txt b/src/mainboard/lowrisc/nexys4ddr/board_info.txt deleted file mode 100644 index a305030..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/board_info.txt +++ /dev/null @@ -1,3 +0,0 @@ -Board name: lowrisc nexys4ddr -Category: eval -Board URL: https://www.google.com/search?q=Tutorial+for+the+debug+preview+of+lowRISC&am... diff --git a/src/mainboard/lowrisc/nexys4ddr/devicetree.cb b/src/mainboard/lowrisc/nexys4ddr/devicetree.cb deleted file mode 100644 index e857276..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/devicetree.cb +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google, Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -chip soc/ucb/riscv - device cpu_cluster 0 on end - chip drivers/generic/generic # I2C0 controller - device i2c 6 on end # Fake component for testing - end -end diff --git a/src/mainboard/lowrisc/nexys4ddr/mainboard.c b/src/mainboard/lowrisc/nexys4ddr/mainboard.c deleted file mode 100644 index 3ef8337..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/mainboard.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <cbmem.h> -#include <device/device.h> -#include <symbols.h> - -static void mainboard_enable(struct device *dev) -{ - uintptr_t ram_base; - size_t ram_size; - - /* FIXME: These values shouldn't necessarily be hardcoded */ - ram_base = 0x80000000; - ram_size = 128 * MiB; - ram_resource(dev, 0, ram_base / KiB, ram_size / KiB); - - cbmem_initialize_empty(); -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/lowrisc/nexys4ddr/memlayout.ld b/src/mainboard/lowrisc/nexys4ddr/memlayout.ld deleted file mode 100644 index 86f3667..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/memlayout.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <memlayout.h> - -#include <arch/header.ld> - -#define START 0x80000000 - -SECTIONS -{ - DRAM_START(START) - BOOTBLOCK(START, 64K) - STACK(START + 8M, 64K) - ROMSTAGE(START + 8M + 64K, 128K) - PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K) - /* hole at (START + 8M + 200K, 56K) */ - RAMSTAGE(START + 8M + 256K, 256K) -} diff --git a/src/mainboard/lowrisc/nexys4ddr/rom_media.c b/src/mainboard/lowrisc/nexys4ddr/rom_media.c deleted file mode 100644 index 7d4ed00..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/rom_media.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc. - * Copyright 2016 Jonathan Neuschäfer j.neuschaefer@gmx.net - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <boot_device.h> -#include <symbols.h> - -/* - * _dram is the start of RAM. We currently need to load coreboot.rom into - * RAM. The actual "rom" code on the FPGAs is in a block ram. - */ -static const struct mem_region_device boot_dev = - MEM_REGION_DEV_RO_INIT(_dram, CONFIG_ROM_SIZE); - -const struct region_device *boot_device_ro(void) -{ - return &boot_dev.rdev; -} diff --git a/src/mainboard/lowrisc/nexys4ddr/romstage.c b/src/mainboard/lowrisc/nexys4ddr/romstage.c deleted file mode 100644 index c918c83..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/romstage.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <program_loading.h> -#include <console/console.h> - -void main(void) -{ - console_init(); - run_ramstage(); -} diff --git a/src/mainboard/lowrisc/nexys4ddr/uart.c b/src/mainboard/lowrisc/nexys4ddr/uart.c deleted file mode 100644 index 7758db3..0000000 --- a/src/mainboard/lowrisc/nexys4ddr/uart.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <types.h> -#include <console/uart.h> -#include <arch/io.h> -#include <boot/coreboot_tables.h> - -uintptr_t uart_platform_base(int idx) -{ - return (uintptr_t) 0x42000000; -} - -/* The clock which the UART is based on */ -unsigned int uart_platform_refclk(void) -{ - return 25 * MHz; -} diff --git a/src/soc/lowrisc/Kconfig b/src/soc/lowrisc/Kconfig deleted file mode 100644 index a514135..0000000 --- a/src/soc/lowrisc/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -# Load all chipsets -source "src/soc/lowrisc/*/Kconfig" diff --git a/src/soc/lowrisc/lowrisc/Kconfig b/src/soc/lowrisc/lowrisc/Kconfig deleted file mode 100644 index 8b35231..0000000 --- a/src/soc/lowrisc/lowrisc/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -config SOC_LOWRISC_LOWRISC - select ARCH_RISCV - select ARCH_BOOTBLOCK_RISCV - select ARCH_VERSTAGE_RISCV - select ARCH_ROMSTAGE_RISCV - select ARCH_RAMSTAGE_RISCV - select BOOTBLOCK_CONSOLE - select DRIVERS_UART_8250MEM_32 - select GENERIC_UDELAY - select HAVE_MONOTONIC_TIMER - select RISCV_USE_ARCH_TIMER - bool - default n - -if SOC_LOWRISC_LOWRISC - -config RISCV_ARCH - string - default "rv64imafd" - -config RISCV_ABI - string - default "lp64d" - -config RISCV_CODEMODEL - string - default "medany" - -endif diff --git a/src/soc/lowrisc/lowrisc/Makefile.inc b/src/soc/lowrisc/lowrisc/Makefile.inc deleted file mode 100644 index ccd9a16..0000000 --- a/src/soc/lowrisc/lowrisc/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -ifeq ($(CONFIG_SOC_LOWRISC_LOWRISC),y) - -bootblock-y += mtime.c -romstage-y += cbmem.c -ramstage-y += cbmem.c -ramstage-y += mtime.c - -endif diff --git a/src/soc/lowrisc/lowrisc/cbmem.c b/src/soc/lowrisc/lowrisc/cbmem.c deleted file mode 100644 index a212666..0000000 --- a/src/soc/lowrisc/lowrisc/cbmem.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <cbmem.h> - -void *cbmem_top(void) -{ - uintptr_t base; - size_t size; - - /* FIXME: These values shouldn't necessarily be hardcoded */ - base = 0x80000000; - size = 128 * MiB; - - return (void *)(base + size); -} diff --git a/util/release/genrelnotes b/util/release/genrelnotes index dfdf21e..3038eb3 100755 --- a/util/release/genrelnotes +++ b/util/release/genrelnotes @@ -349,7 +349,7 @@
get_log_dedupe "RISC-V" \ "$(for codedir in $(grep -rl "_RISCV" --include=Kconfig | grep -v 'payloads/|drivers/|vendorcode/|console' ); do dirname "$codedir"; done | grep -v '^src$')" \ - "riscv|risc-v|lowrisc|sifive" + "riscv|risc-v|sifive"
get_log_dedupe "MIPS" \ "$(for codedir in $(grep -rl "_MIPS" --include=Kconfig | \