Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34694 )
Change subject: soc/intel: Drop config IED_REGION_SIZE ......................................................................
soc/intel: Drop config IED_REGION_SIZE
This a non-configurable platform constant, and if it were to be made configurable, it would be bool on/off switch.
Change-Id: I812b35f765c7d6da95283714db0b38a3a09cec28 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/include/soc/smm.h M src/soc/intel/cannonlake/memmap.c M src/soc/intel/cannonlake/romstage/fsp_params.c M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/include/soc/smm.h M src/soc/intel/icelake/memmap.c M src/soc/intel/icelake/romstage/fsp_params.c M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/include/soc/smm.h M src/soc/intel/skylake/memmap.c M src/soc/intel/skylake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage_fsp20.c 13 files changed, 16 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/34694/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 4bc6a65..a59d27f 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -131,10 +131,6 @@ string default "cnl"
-config IED_REGION_SIZE - hex - default 0x400000 - config HEAP_SIZE hex default 0x8000 diff --git a/src/soc/intel/cannonlake/include/soc/smm.h b/src/soc/intel/cannonlake/include/soc/smm.h index c0ab82f..605cc99 100644 --- a/src/soc/intel/cannonlake/include/soc/smm.h +++ b/src/soc/intel/cannonlake/include/soc/smm.h @@ -47,6 +47,9 @@ int smm_save_state_in_msrs; };
+/* Intel Enhanced Debug region must be 4MB */ +#define FIXED_IED_REGION_SIZE (4*MiB) + /* Mainboard handler for eSPI SMIs */ void mainboard_smi_espi_handler(void);
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c index 18ddeee..6674c9d 100644 --- a/src/soc/intel/cannonlake/memmap.c +++ b/src/soc/intel/cannonlake/memmap.c @@ -51,7 +51,7 @@ uintptr_t sub_base; size_t sub_size; void *smm_base; - const size_t ied_size = CONFIG_IED_REGION_SIZE; + const size_t ied_size = FIXED_IED_REGION_SIZE; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
smm_region(&smm_base, &sub_size); diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 3ba997d..9b27433 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -35,7 +35,7 @@ /* Set IGD stolen size to 64MB. */ m_cfg->IgdDvmt50PreAlloc = 2; m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; - m_cfg->IedSize = CONFIG_IED_REGION_SIZE; + m_cfg->IedSize = FIXED_IED_REGION_SIZE; m_cfg->SaGv = config->SaGv; if (CONFIG(SOC_INTEL_CANNONLAKE_PCH_H)) m_cfg->UserBd = BOARD_TYPE_DESKTOP; diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 7931018..2f6eb9a 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -82,10 +82,6 @@ string default "icl"
-config IED_REGION_SIZE - hex - default 0x400000 - config HEAP_SIZE hex default 0x8000 diff --git a/src/soc/intel/icelake/include/soc/smm.h b/src/soc/intel/icelake/include/soc/smm.h index 991c593..2887c5b 100644 --- a/src/soc/intel/icelake/include/soc/smm.h +++ b/src/soc/intel/icelake/include/soc/smm.h @@ -46,6 +46,9 @@ int smm_save_state_in_msrs; };
+/* Intel Enhanced Debug region must be 4MB */ +#define FIXED_IED_REGION_SIZE (4*MiB) + /* Mainboard handler for eSPI SMIs */ void mainboard_smi_espi_handler(void);
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c index 317f0fb..05ed749 100644 --- a/src/soc/intel/icelake/memmap.c +++ b/src/soc/intel/icelake/memmap.c @@ -49,7 +49,7 @@ uintptr_t sub_base; size_t sub_size; void *smm_base; - const size_t ied_size = CONFIG_IED_REGION_SIZE; + const size_t ied_size = FIXED_IED_REGION_SIZE; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
smm_region(&smm_base, &sub_size); diff --git a/src/soc/intel/icelake/romstage/fsp_params.c b/src/soc/intel/icelake/romstage/fsp_params.c index a78c8a4..23568a8 100644 --- a/src/soc/intel/icelake/romstage/fsp_params.c +++ b/src/soc/intel/icelake/romstage/fsp_params.c @@ -42,7 +42,7 @@ }
m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; - m_cfg->IedSize = CONFIG_IED_REGION_SIZE; + m_cfg->IedSize = FIXED_IED_REGION_SIZE; m_cfg->SaGv = config->SaGv; m_cfg->UserBd = BOARD_TYPE_ULT_ULX; m_cfg->RMT = config->RMT; diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 4f4ec46..ad5f30c 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -153,10 +153,6 @@ hex default 0x80000
-config IED_REGION_SIZE - hex - default 0x400000 - config PCR_BASE_ADDRESS hex default 0xfd000000 diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h index 0c5e976..9d8e24e 100644 --- a/src/soc/intel/skylake/include/soc/smm.h +++ b/src/soc/intel/skylake/include/soc/smm.h @@ -48,6 +48,9 @@ int smm_save_state_in_msrs; };
+/* Intel Enhanced Debug region must be 4MB */ +#define FIXED_IED_REGION_SIZE (4*MiB) + void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase); void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index 1058300..5133c21 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -63,7 +63,7 @@ uintptr_t sub_base; size_t sub_size; void *smm_base; - const size_t ied_size = CONFIG_IED_REGION_SIZE; + const size_t ied_size = FIXED_IED_REGION_SIZE; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
smm_region(&smm_base, &sub_size); diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 2d0de2f..b01dfb8 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -71,7 +71,7 @@
upd->MmioSize = 0x800; /* 2GB in MB */ upd->TsegSize = CONFIG_SMM_TSEG_SIZE; - upd->IedSize = CONFIG_IED_REGION_SIZE; + upd->IedSize = FIXED_IED_REGION_SIZE; upd->ProbelessTrace = config->ProbelessTrace; upd->EnableTraceHub = config->EnableTraceHub; if (vboot_recovery_mode_enabled()) diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index bb86c63..b6e3551 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -271,7 +271,7 @@
m_cfg->MmioSize = 0x800; /* 2GB in MB */ m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; - m_cfg->IedSize = CONFIG_IED_REGION_SIZE; + m_cfg->IedSize = FIXED_IED_REGION_SIZE; m_cfg->ProbelessTrace = config->ProbelessTrace; m_cfg->SaGv = config->SaGv; m_cfg->UserBd = BOARD_TYPE_ULT_ULX;