[coreboot-gerrit] Change in coreboot[master]: mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generation

[Srinidhi N Kaushik (Code Review)]

Hello build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Nick Vaccaro, Raj Astekar,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/39315

to look at the new patch set (#5).

Change subject: mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generation
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mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generation

This change uses drivers/intel/wifi chip for CNVi device and
adds dynamic SSDT entires for CNVi also export wake gpio for CNVi

BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board and check for SSDT entries
for CNVi

Signed-off-by: Srinidhi N Kaushik 
Change-Id: Icdbffa0c29c9e0849a6a99f8592b6f35c0bb3207
---
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
2 files changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/39315/5