Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33624 )
Change subject: soc/amd/stoneyridge: Change code to accommodate Merlin Falcon SOC ......................................................................
Patch Set 14:
(6 comments)
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/acp... File src/soc/amd/stoneyridge/acpi/cpu.asl:
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/acp... PS3, Line 37: If (LGreaterEqual (\PCNT, 8))
Really? So I only need P000 through P003.
Done
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/inc... File src/soc/amd/stoneyridge/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/inc... PS3, Line 44: * Device IDs
For the record, I'm OK with not #define-ing the device IDs here. […]
Done
https://review.coreboot.org/c/coreboot/+/33624/2/src/soc/amd/stoneyridge/nor... File src/soc/amd/stoneyridge/northbridge.c:
https://review.coreboot.org/c/coreboot/+/33624/2/src/soc/amd/stoneyridge/nor... PS2, Line 353:
Because I copy paste an example from elsewhere, just changing names. Will do.
Done
https://review.coreboot.org/c/coreboot/+/33624/2/src/soc/amd/stoneyridge/nor... PS2, Line 353:
Because I copy paste an example from elsewhere, just changing names. Will do.
Done
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/nor... File src/soc/amd/stoneyridge/northbridge.c:
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/nor... PS3, Line 351:
Can you remove these tabs so that it matches the nearby source? I thought you said you'd change it. […]
Done
https://review.coreboot.org/c/coreboot/+/33624/3/src/soc/amd/stoneyridge/nor... PS3, Line 358: .devices = pci_device_ids,
I noticed I missed, uploaded a patch 4, but for some unknown reason it did not show up here. […]
Done