Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81395?usp=email )
Change subject: Revert "mb/starlabs/starbook/{adl,rpl}: Disable GpioOverride" ......................................................................
Revert "mb/starlabs/starbook/{adl,rpl}: Disable GpioOverride"
This reverts commit 8902dfa2bdf33b8ae69fa0d5161b28f67f8c0881.
This was originally assumed to be an FSP/Descriptor/PMC mismatch but it turns out that the problem was coreboot incorrectly detecting ASPM support on devices.
Revert so that a proper fix can be applied.
Change-Id: I3f83e79c1b21a6c3799abed4a279b8bd59ac3570 Signed-off-by: Sean Rhodes sean@starlabs.systems Reviewed-on: https://review.coreboot.org/c/coreboot/+/81395 Reviewed-by: Martin L Roth gaumless@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/starlabs/starbook/variants/adl/gpio.c M src/mainboard/starlabs/starbook/variants/adl/romstage.c M src/mainboard/starlabs/starbook/variants/rpl/gpio.c M src/mainboard/starlabs/starbook/variants/rpl/romstage.c 4 files changed, 8 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved
diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index 988e6de..b7c9a8f 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -209,11 +209,11 @@ /* D5: Not Connected */ PAD_NC(GPP_D5, NONE), /* D6: Clock Request 1 PCH M.2 SSD */ -// PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7: Clock Request 2 Wireless LAN */ -// PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* D8: Clock Request 3 LAN */ -// PAD_NC(GPP_D8, NONE), + PAD_NC(GPP_D8, NONE), /* D9: GSPI 2 FPS */ PAD_NC(GPP_D9, NONE), /* D10: GSPI 2 Clock */ @@ -374,7 +374,7 @@ /* H18: CPI C10 Gate */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* H19: Clock Request 4 CPU M.2 SSD */ -// PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H20: Not Connected */ PAD_NC(GPP_H20, NONE), /* H21: Not Connected */ diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c index 81f1ef3..17629b4 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c @@ -35,5 +35,4 @@ mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 4);
mupd->FspmConfig.DmiMaxLinkSpeed = 4; - mupd->FspmConfig.GpioOverride = 0; }; diff --git a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c index 4b4f9ed..aba6dc8 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c @@ -209,11 +209,11 @@ /* D5: Not Connected */ PAD_NC(GPP_D5, NONE), /* D6: Clock Request 1 PCH M.2 SSD */ -// PAD_NC(GPP_D6, NONE), + PAD_NC(GPP_D6, NONE), /* D7: Clock Request 2 Wireless LAN */ -// PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* D8: Clock Request 3 LAN */ -// PAD_NC(GPP_D8, NONE), + PAD_NC(GPP_D8, NONE), /* D9: GSPI 2 FPS */ PAD_NC(GPP_D9, NONE), /* D10: GSPI 2 Clock */ @@ -374,7 +374,7 @@ /* H18: CPI C10 Gate */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* H19: Clock Request 4 CPU M.2 SSD */ -// PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H20: Not Connected */ PAD_NC(GPP_H20, NONE), /* H21: Not Connected */ diff --git a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c index 085dbfc..e7e1c6a 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c @@ -44,5 +44,4 @@ }
mupd->FspmConfig.DmiMaxLinkSpeed = 4; - mupd->FspmConfig.GpioOverride = 0; };