Attention is currently required from: Patrick Rudolph. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49829 )
Change subject: [UNTESTED]soc/intel/xeon_sp/skx: Load MCU on AP ......................................................................
[UNTESTED]soc/intel/xeon_sp/skx: Load MCU on AP
On server platforms the FIT mechanism only updates MCU on the BSP.
TODO: test if parallel loading works (it does not on CPX)
Change-Id: I06c32918324511aae017d20335185429adb6c145 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/xeon_sp/skx/cpu.c 1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/49829/1
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c index f9cd356..5158ea4 100644 --- a/src/soc/intel/xeon_sp/skx/cpu.c +++ b/src/soc/intel/xeon_sp/skx/cpu.c @@ -14,9 +14,11 @@ #include <soc/util.h> #include <assert.h> #include "chip.h" +#include <cpu/intel/microcode.h> #include <cpu/intel/smm_reloc.h> #include <cpu/intel/em64t101_save_state.h>
+static const void *microcode_patch;
static const config_t *chip_config = NULL;
@@ -44,6 +46,17 @@ mca_configure(); }
+/* + * On server platforms the FIT mechanism only updates the microcode on + * the BMC. Loading MCU on AP in parallel seems to fail in 10% of the cases + * so do it serialized. + */ +static void get_microcode_info(const void **microcode, int *parallel) +{ + *microcode = microcode_patch; + *parallel = 0; +} + static void xeon_sp_core_init(struct device *cpu) { msr_t msr; @@ -219,6 +232,7 @@ .get_smm_info = get_smm_info, .pre_mp_smm_init = smm_initialize, .relocation_handler = smm_relocation_handler, + .get_microcode_info = get_microcode_info, .post_mp_init = post_mp_init, };
@@ -226,6 +240,14 @@ { FUNC_ENTER();
+ microcode_patch = intel_microcode_find(); + + if (!microcode_patch) + printk(BIOS_ERR, "microcode not found in CBFS!\n"); + + /* This is normally already done via FIT. */ + intel_microcode_load_unlocked(microcode_patch); + /* * This gets used in cpu device callback. Other than cpu 0, * rest of the CPU devices do not have