[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Modify CSE's PCI BAR address

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44211 )

Change subject: soc/intel/cannonlake: Modify CSE's PCI BAR address
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44211/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44211/1//COMMIT_MSG@14 
PS1, Line 14:
> The change will be useful for Puff. […]

Understood. For any changes that are meant to land in firmware branch, we add the tag BRANCH= so that the team can use it to ensure the required changes are cherry-picked to that branch.