Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/29693
Change subject: mb/intel/cannonlake_rvp: Enable dptf functionality ......................................................................
mb/intel/cannonlake_rvp: Enable dptf functionality
Enable dptf functionality for CannonLake based U and Y systems.
Change-Id: I9393384b64322cb91a339964366388a176ce80a9 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/29693/1
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index bb963c9..32b33f4 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -63,6 +63,9 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
+ # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5"
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 55afde2..ec0ce24 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -63,6 +63,9 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
+ # Enable DPTF + register "dptf_enable" = "1" + # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5"