[coreboot-gerrit] Change in coreboot[master]: soc/sifive/fu540: add code for spi and map flash to memory spaces

[Xiang Wang (Code Review)]

Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33055 )

Change subject: soc/sifive/fu540: add code for spi and map flash to memory spaces
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Patch Set 12:

(3 comments)

https://review.coreboot.org/c/coreboot/+/33055/1/src/soc/sifive/fu540/spi.c 
File src/soc/sifive/fu540/spi.c:

https://review.coreboot.org/c/coreboot/+/33055/1/src/soc/sifive/fu540/spi.c@... 
PS1, Line 68: 		if (bytesout) {
> Corrected.

Done

https://review.coreboot.org/c/coreboot/+/33055/1/src/soc/sifive/fu540/spi.c@... 
PS1, Line 103: 	.xfer  = spi_xfer_,
> spi_xfer_vector is commonly used for non duplex transfers

Done

https://review.coreboot.org/c/coreboot/+/33055/9/src/soc/sifive/fu540/spi.c 
File src/soc/sifive/fu540/spi.c:

https://review.coreboot.org/c/coreboot/+/33055/9/src/soc/sifive/fu540/spi.c@... 
PS9, Line 56: static uint8_t spi_rx(volatile struct spi_ctrl *spictrl)
> Ah yes, that makes totally sense. Thanks for explaining.

Done