Hello Patrick Rudolph, Jingle Hsu, Morgan Jang, Jonathan Zhang, David Hendricks, build bot (Jenkins), Andrey Petrov, Anjaneya "Reddy" Chagam, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38994
to look at the new patch set (#2).
Change subject: soc/intel/xeon_sp: Enable LPC generic IO decode range ......................................................................
soc/intel/xeon_sp: Enable LPC generic IO decode range
To use Intel common block LPC function that enables the IO ranges defined in devicetree.cb.
Tested on OCP Tioga Pass with BMC LPC working. Signed-off-by: Johnny Lin johnny_lin@wiwynn.com
Change-Id: I675489d3c66dad259e4101a17300176f6c0e8bd8 --- M src/soc/intel/xeon_sp/Makefile.inc M src/soc/intel/xeon_sp/bootblock/bootblock.c A src/soc/intel/xeon_sp/bootblock/pch.c M src/soc/intel/xeon_sp/chip.h A src/soc/intel/xeon_sp/include/soc/bootblock.h M src/soc/intel/xeon_sp/lpc.c 6 files changed, 80 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/38994/2