Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32652 )
Change subject: soc/amd/stoneyridge: Rework SPI base address get/set
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Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/32652/4/src/soc/amd/stoneyridge/southbridge....
File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/#/c/32652/4/src/soc/amd/stoneyridge/southbridge....
PS4, Line 410: sb_set_spibase
I am guessing this is going to be called by more than just sb_init_spi_base() in the future?
https://review.coreboot.org/#/c/32652/4/src/soc/amd/stoneyridge/southbridge....
PS4, Line 414: /* only two types of CS# enables are allowed */
This is a difference in behavior than before. I am guessing that's intentional?
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