Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80683?usp=email )
Change subject: soc/intel/xeon_sp: Refactor IOAT compiler optimization outs ......................................................................
soc/intel/xeon_sp: Refactor IOAT compiler optimization outs
IOAT logics are optimized out for non-IOAT platforms where CONFIG(HAVE_IOAT_DOMAINS) as false.
This patch puts CONFIG(HAVE_IOAT_DOMAINS) check together ahead of is_ioat_iio_stack_res() check in the corresponding if statement to fulfill the optimization outs.
TEST=intel/archercity CRB
Change-Id: I2d16c6ff5320bc9195a1033b6d55e3d997b19b88 Signed-off-by: Shuo Liu shuo.liu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/80683 Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/uncore_acpi.c 2 files changed, 2 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h index b532b9a..43bf9d6 100644 --- a/src/soc/intel/xeon_sp/include/soc/util.h +++ b/src/soc/intel/xeon_sp/include/soc/util.h @@ -25,14 +25,7 @@ void get_iiostack_info(struct iiostack_resource *info); bool is_pcie_iio_stack_res(const STACK_RES *res); bool is_ubox_stack_res(const STACK_RES *res); -#if CONFIG(HAVE_IOAT_DOMAINS) bool is_ioat_iio_stack_res(const STACK_RES *res); -#else -static inline bool is_ioat_iio_stack_res(const STACK_RES *res) -{ - return false; -} -#endif void bios_done_msr(void *unused);
#endif diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index 51c2e0e..a9a5bac 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -336,7 +336,7 @@ }
// Add IOAT End Points (with memory resources. We don't report every End Point device.) - if (is_ioat_iio_stack_res(ri)) { + if (CONFIG(HAVE_IOAT_DOMAINS) && is_ioat_iio_stack_res(ri)) { for (int b = ri->BusBase; b <= ri->BusLimit; ++b) { struct device *dev = pcidev_path_on_bus(b, PCI_DEVFN(0, 0)); while (dev) { @@ -520,7 +520,7 @@ for (int stack = (MAX_LOGIC_IIO_STACK - 1); stack >= 0; --stack) { const STACK_RES *ri = &hob->PlatformData.IIO_resource[socket].StackRes[stack]; // Add the IOAT ATS devices to the SATC - if (is_ioat_iio_stack_res(ri)) + if (CONFIG(HAVE_IOAT_DOMAINS) && is_ioat_iio_stack_res(ri)) current = xeonsp_create_satc_ioat(current, ri); } }