9 May
2022
9 May
'22
11:53 p.m.
Attention is currently required from: Nico Huber, Paul Menzel, Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64094 )
Change subject: nb/intel/gm45: Allow for PCI BARs above 4G ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
File src/northbridge/intel/gm45/northbridge.c:
https://review.coreboot.org/c/coreboot/+/64094/comment/b539b1ee_38eca474 PS3, Line 189: const uint64_t touud = get_touud();
Nevermind. I forgot about the remapping. It will virtually always exceed […]
Even without the reclaiming of memory below 4G, the hardware doesn't map the ME stolen memory for the host (x86).
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