Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41345 )
Change subject: mb/google/volteer: fix error in generic SPD ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/41345/9/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/volteer/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/41345/9/src/mainboard/google/voltee... PS9, Line 7: H9HCNNNBKMMLXR-NEE
This is wrong. […]
No, we haven't seen that memory part yet. It's a new part that's planned for EVT.
It was changed because once I fixed an error in the DRAM ID 0 SPD, I saw that the SPD for this part was identical to the SPD for DRAM ID 0 (after the fix).
https://review.coreboot.org/c/coreboot/+/41345/9/src/mainboard/google/voltee... PS9, Line 9: MT53E1G32D2NP-046 WT:A
Same here. […]
Numbers were collapsed to be sequential, and I notified variant projects planning to use said parts, and they have acknowledged and granted approval of the change.
https://review.coreboot.org/c/coreboot/+/41345/9/src/mainboard/google/voltee... PS9, Line 5: K4U6E3S4AA-MGCL : # H9HCNNNBKMMLXR-NEE
I don't think these two parts can really be combined together. […]
That implies that the SPD for our Ripto memory part is incorrect, yet we haven't seen any issues with that part yet.
IIUC, this is the SPD that intel qualified for that part : https://drive.google.com/file/d/1M3kPHAEWp4J0j2GUZ50KzzDeB5SmR4hc/view
based on what I see here : https://docs.google.com/spreadsheets/d/1SJ7GNbl1heYBQI22E798cII_VZEeavLAuDLo...