HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36057 )
Change subject: src/{device,drivers,mb,nb,socsb}: Remove unused 'include <console/console.h>' ......................................................................
src/{device,drivers,mb,nb,socsb}: Remove unused 'include <console/console.h>'
Change-Id: I0c965e598e260ff8129aa07fb9fc5bf6e784e1d8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/device/dram/ddr_common.c M src/drivers/intel/wifi/wifi.c M src/drivers/vpd/vpd_premem.c M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/lenovo/x201/mainboard.c M src/mainboard/msi/ms7707/romstage.c M src/mainboard/packardbell/ms2290/mainboard.c M src/northbridge/amd/amdht/comlib.c M src/northbridge/intel/e7505/memmap.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/nehalem/memmap.c M src/northbridge/intel/sandybridge/memmap.c M src/soc/amd/picasso/chip.c M src/soc/intel/apollolake/lpc.c M src/soc/intel/apollolake/memmap.c M src/soc/intel/common/block/chip/chip.c M src/soc/intel/fsp_broadwell_de/smbus-imc.c M src/soc/mediatek/mt8183/dsi.c M src/soc/mediatek/mt8183/include/soc/spm.h M src/soc/qualcomm/qcs405/uart.c M src/soc/qualcomm/sdm845/qclib.c M src/southbridge/intel/bd82x6x/early_pch.c M src/southbridge/intel/i82801gx/pci.c M src/southbridge/nvidia/ck804/early_setup_car.c 25 files changed, 0 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/36057/1
diff --git a/src/device/dram/ddr_common.c b/src/device/dram/ddr_common.c index bc87712..dcfa18d 100644 --- a/src/device/dram/ddr_common.c +++ b/src/device/dram/ddr_common.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/dram/common.h> #include <types.h>
diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index 926905c..92b51c2 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> diff --git a/src/drivers/vpd/vpd_premem.c b/src/drivers/vpd/vpd_premem.c index 14e8032..b952569 100644 --- a/src/drivers/vpd/vpd_premem.c +++ b/src/drivers/vpd/vpd_premem.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <string.h>
#include "vpd.h" diff --git a/src/mainboard/google/hatch/variants/akemi/gpio.c b/src/mainboard/google/hatch/variants/akemi/gpio.c index 1ba9d35..4be3c34 100644 --- a/src/mainboard/google/hatch/variants/akemi/gpio.c +++ b/src/mainboard/google/hatch/variants/akemi/gpio.c @@ -17,7 +17,6 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <console/console.h>
static const struct pad_config ssd_sku_gpio_table[] = { /* A0 : NC */ diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index a57d863..c021db1 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci_ops.h> #include <ec/acpi/ec.h> diff --git a/src/mainboard/msi/ms7707/romstage.c b/src/mainboard/msi/ms7707/romstage.c index 30bb545..e2b15df 100644 --- a/src/mainboard/msi/ms7707/romstage.c +++ b/src/mainboard/msi/ms7707/romstage.c @@ -18,7 +18,6 @@ #include <device/pci_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/pmbase.h> -#include <console/console.h> #include <southbridge/intel/bd82x6x/pch.h>
void pch_enable_lpc(void) diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 809ccea..f64e9e3 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -16,7 +16,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <arch/io.h> #include <device/pci_def.h> diff --git a/src/northbridge/amd/amdht/comlib.c b/src/northbridge/amd/amdht/comlib.c index b36d4b4..883f634 100644 --- a/src/northbridge/amd/amdht/comlib.c +++ b/src/northbridge/amd/amdht/comlib.c @@ -17,7 +17,6 @@
#include <device/pci.h> #include <device/pci_ops.h> -#include <console/console.h> #include <cpu/amd/msr.h> #include <device/pci_def.h>
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c index 11af6e3..c6a20fa 100644 --- a/src/northbridge/intel/e7505/memmap.c +++ b/src/northbridge/intel/e7505/memmap.c @@ -17,7 +17,6 @@ #include <device/pci_ops.h> #include <arch/romstage.h> #include <cbmem.h> -#include <console/console.h> #include <cpu/x86/mtrr.h> #include <program_loading.h> #include "e7505.h" diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c index b1eb770..007a67d 100644 --- a/src/northbridge/intel/haswell/memmap.c +++ b/src/northbridge/intel/haswell/memmap.c @@ -17,7 +17,6 @@ #define __SIMPLE_DEVICE__
#include <arch/romstage.h> -#include <console/console.h> #include <commonlib/helpers.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c index 6c540a5..75a6c7e 100644 --- a/src/northbridge/intel/i440bx/memmap.c +++ b/src/northbridge/intel/i440bx/memmap.c @@ -18,7 +18,6 @@ #include <arch/romstage.h> #include <device/pci_ops.h> #include <cbmem.h> -#include <console/console.h> #include <commonlib/helpers.h> #include <cpu/x86/mtrr.h> #include <program_loading.h> diff --git a/src/northbridge/intel/nehalem/memmap.c b/src/northbridge/intel/nehalem/memmap.c index fd10542..1c17b0d 100644 --- a/src/northbridge/intel/nehalem/memmap.c +++ b/src/northbridge/intel/nehalem/memmap.c @@ -19,7 +19,6 @@ #include <arch/romstage.h> #include <device/pci_ops.h> #include <cbmem.h> -#include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> #include <program_loading.h> diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c index 95bf458..67de344 100644 --- a/src/northbridge/intel/sandybridge/memmap.c +++ b/src/northbridge/intel/sandybridge/memmap.c @@ -18,7 +18,6 @@ #include <arch/romstage.h> #include <device/pci_ops.h> #include <cbmem.h> -#include <console/console.h> #include <cpu/intel/smm_reloc.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 65d98b1..323b98b 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -14,7 +14,6 @@ */
#include <bootstate.h> -#include <console/console.h> #include <cpu/amd/mtrr.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index 2d59f7d..636dd03 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/pci.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/rtc.h> diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c index 77711eb..7b60270 100644 --- a/src/soc/intel/apollolake/memmap.c +++ b/src/soc/intel/apollolake/memmap.c @@ -18,7 +18,6 @@ #include <arch/romstage.h> #include <assert.h> #include <cbmem.h> -#include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> #include <device/pci.h> diff --git a/src/soc/intel/common/block/chip/chip.c b/src/soc/intel/common/block/chip/chip.c index 5ab8f6b..6551e91 100644 --- a/src/soc/intel/common/block/chip/chip.c +++ b/src/soc/intel/common/block/chip/chip.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <soc/pci_devs.h> #include <soc/soc_chip.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smbus-imc.c b/src/soc/intel/fsp_broadwell_de/smbus-imc.c index 35e42da..61dc080 100644 --- a/src/soc/intel/fsp_broadwell_de/smbus-imc.c +++ b/src/soc/intel/fsp_broadwell_de/smbus-imc.c @@ -14,7 +14,6 @@ */
#include <stddef.h> -#include <console/console.h> #include <device/pci_def.h> #include <device/early_smbus.h> #include <intelblocks/imc.h> diff --git a/src/soc/mediatek/mt8183/dsi.c b/src/soc/mediatek/mt8183/dsi.c index daa06ca..604592f 100644 --- a/src/soc/mediatek/mt8183/dsi.c +++ b/src/soc/mediatek/mt8183/dsi.c @@ -15,7 +15,6 @@
#include <assert.h> #include <device/mmio.h> -#include <console/console.h> #include <delay.h> #include <soc/dsi.h> #include <soc/pll.h> diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h index 4ca72b6..6d53c1c 100644 --- a/src/soc/mediatek/mt8183/include/soc/spm.h +++ b/src/soc/mediatek/mt8183/include/soc/spm.h @@ -17,7 +17,6 @@ #define SOC_MEDIATEK_MT8183_SPM_H
#include <arch/barrier.h> -#include <console/console.h> #include <soc/addressmap.h> #include <string.h> #include <stdint.h> diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index 3e98088..24045cd 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -30,7 +30,6 @@
#include <device/mmio.h> #include <boot/coreboot_tables.h> -#include <console/console.h> #include <console/uart.h> #include <delay.h> #include <gpio.h> diff --git a/src/soc/qualcomm/sdm845/qclib.c b/src/soc/qualcomm/sdm845/qclib.c index 9c05452..ae7251a 100644 --- a/src/soc/qualcomm/sdm845/qclib.c +++ b/src/soc/qualcomm/sdm845/qclib.c @@ -15,7 +15,6 @@
#include <cbfs.h> #include <fmap.h> -#include <console/console.h> #include <soc/symbols.h> #include <soc/qclib_common.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 73fce3b..3b4c91bd 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -21,7 +21,6 @@ #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmbase.h> #include <southbridge/intel/common/rcba.h> -#include <console/console.h>
/* For DMI bar. */ #include <northbridge/intel/sandybridge/sandybridge.h> diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c index d493b79..5ff9d38 100644 --- a/src/southbridge/intel/i82801gx/pci.c +++ b/src/southbridge/intel/i82801gx/pci.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index e2cc40a..d981b7e 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -17,7 +17,6 @@ */
#include <arch/io.h> -#include <console/console.h> #include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h>