Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44912 )
Change subject: vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3333 ......................................................................
vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3333
Update FSP headers for Tiger Lake platform generated based FSP version 3333. Previous version was 3313. Changes Include: 1. Update comments 2. Add new UPD for Gpio Override support
BUG=b:166790597 BRANCH=none TEST=build and boot volteer proto2
Cq-Depend:chromium-internal:3240396,chromium-internal:2870145 Signed-off-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com Change-Id: Ie3f0688143eef532946c7a2141909c1ac173fc2f Reviewed-on: https://review.coreboot.org/c/coreboot/+/44912 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h 2 files changed, 15 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Srinidhi N Kaushik: Looks good to me, but someone else must approve
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h index 32b6a32..0b3fe7d 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h @@ -2487,7 +2487,18 @@
/** Offset 0x089F - Reserved **/ - UINT8 Reserved44[129]; + UINT8 Reserved44[124]; + +/** Offset 0x091B - GPIO Override + Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings + before moved to FSP. Available configurations 0: Disable;1: Level 1 - skips GpioSetNativePadByFunction;Level + 2 - skips GpioSetNativePadByFunction and GpioSetPadMode +**/ + UINT8 GpioOverride; + +/** Offset 0x091C - Reserved +**/ + UINT8 Reserved45[4]; } FSP_M_CONFIG;
/** Fsp M UPD Configuration @@ -2508,7 +2519,7 @@
/** Offset 0x0920 **/ - UINT8 UnusedUpdSpace26[6]; + UINT8 UnusedUpdSpace25[6];
/** Offset 0x0926 **/ diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h index b0d9ca9..315a0a7 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h @@ -828,8 +828,8 @@ **/ UINT8 AmtKvmEnabled;
-/** Offset 0x040E - KVM Switch - Enable/Disable. 0: Disable, 1: enable, KVM enable/disable state by Mebx. +/** Offset 0x040E - Force MEBX execution + Enable/Disable. 0: Disable, 1: enable, Force MEBX execution. $EN_DIS **/ UINT8 ForcMebxSyncUp;