FEI WANG (wangfei.jimei@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5894
-gerrit
commit 892503aabf9476bc4ef793ba1b980efee04fb0ba Author: FEI WANG wangfei.jimei@gmail.com Date: Sat May 31 15:59:46 2014 +0100
vendorcode/intel/fsp: Update FSP_VENDORCODE_HEADER_PATH
Minor change in Kconfig to remove "/" defined in FSP_VENDORCODE_HEADER_PATH and update the path in Makefile.inc.
Change-Id: Ic19ab9560aabe307d45b560f167874383cc920aa Signed-off-by: Fei Wang wangfei.jimei@gmail.com Signed-off-by: FEI WANG wangfei.jimei@gmail.com --- src/vendorcode/intel/Kconfig | 8 ++++---- src/vendorcode/intel/Makefile.inc | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index 37d5c80..21b48ae 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -19,7 +19,7 @@
config FSP_VENDORCODE_HEADER_PATH string - default "fsp/ivybridge_bd82x6x/" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X - default "fsp/ivybridge_i89xx/" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX - default "fsp/baytrail/" if SOC_INTEL_FSP_BAYTRAIL - default "fsp/rangeley/" if CPU_INTEL_FSP_MODEL_406DX + default "fsp/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X + default "fsp/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX + default "fsp/baytrail" if SOC_INTEL_FSP_BAYTRAIL + default "fsp/rangeley" if CPU_INTEL_FSP_MODEL_406DX diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index 866ebb3..3fc387c 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -19,9 +19,9 @@
ifneq ($(CONFIG_FSP_VENDORCODE_HEADER_PATH),) FSP_PATH := $(call strip_quotes,$(CONFIG_FSP_VENDORCODE_HEADER_PATH)) -FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) -FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) +FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)/srx/*.c) +FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)/srx/$(notdir $(file))) ramstage-y += $(FSP_C_INPUTS)
-CFLAGS_x86_32 += -Isrc/vendorcode/intel/$(FSP_PATH)include +CFLAGS_x86_32 += -Isrc/vendorcode/intel/$(FSP_PATH)/include endif