Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35141 )
Change subject: mb/google/drallion: Add memory init setup for drallion
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Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35141/3/src/mainboard/google/dralli...
File src/mainboard/google/drallion/variants/drallion/gpio.c:
https://review.coreboot.org/c/coreboot/+/35141/3/src/mainboard/google/dralli...
PS3, Line 237: /* PCH_MEM_STRAP0 */ PAD_CFG_GPI(GPP_F12, NONE, PLTRST),
Should we put this into early init table? We need this in ROM stage.
Agree, Please move to early gpio table.
https://review.coreboot.org/c/coreboot/+/35141/3/src/mainboard/google/dralli...
File src/mainboard/google/drallion/variants/drallion/memory.c:
https://review.coreboot.org/c/coreboot/+/35141/3/src/mainboard/google/dralli...
PS3, Line 49: int variant_memory_sku
So, There is no duplicate right. This function is defined only in memory.c file.
No. This is fine.
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