Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Matt DeVillier, Patrick Rudolph.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80337?usp=email )
Change subject: cpu/x86: Link page tables in stage if possible ......................................................................
Patch Set 13:
(9 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80337/comment/6bcb54bc_6bbb9575 : PS13, Line 9: 32 to 64
32-bits to 64-bits
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/162b91e6_06e455b4 : PS13, Line 9: back and forward
"backward and forward" or "back and forth"
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/cb0d347f_54493a29 : PS13, Line 10: tables
table
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/7ef79674_e5cc382b : PS13, Line 10: 32bit
32-bits
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/78decd16_8a6be729 : PS13, Line 14: cbfs
CBFS
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/6b7d10c1_c2325e34 : PS13, Line 22: used
using
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/03af8c6b_3c6d025e : PS13, Line 26: cbfs
CBFS
Done
https://review.coreboot.org/c/coreboot/+/80337/comment/ce1c17f0_acf831bd : PS13, Line 28: TESTED
TEST: <...>
I don't understand this. I'm stating that I tested it on the following platforms with the test being reaching a payload. TEST seems to indicate what a valid test would be for this code without implying that I actually tested it.
File src/cpu/x86/64bit/pt.S:
https://review.coreboot.org/c/coreboot/+/80337/comment/87b30431_fe7f6e6e : PS13, Line 21: .align 4096
wouldn't it make sense to change the alignment depending on the configuration to prevent waste of space when page tables are in CBFS ?
No space is wasted as this is the first entry of the .rodata section. 0 is always aligned