[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add mainboard hook for overriding SoC config

[Jes Klinke (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Jes Klinke, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/44914

to look at the new patch set (#2).

Change subject: soc/intel/tigerlake: Add mainboard hook for overriding SoC config
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soc/intel/tigerlake: Add mainboard hook for overriding SoC config

TEST=util/abuild/abuild -t GOOGLE_VOLTEER -c max -x
BUG=b:154333137

Change-Id: Iff28e4a29fab5c22c410cdc743d0402134c4ac56
Signed-off-by: [e-mail]
---
M src/soc/intel/tigerlake/fsp_params.c
M src/soc/intel/tigerlake/include/soc/ramstage.h
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/44914/2