Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37874 )
Change subject: soc/intel/cannonlake: Add VR config for CML
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37874/5/src/soc/intel/cannonlake/ch...
File src/soc/intel/cannonlake/chip.h:
https://review.coreboot.org/c/coreboot/+/37874/5/src/soc/intel/cannonlake/ch...
PS5, Line 226: performance
Should performance be the default if cpu_pl2_4_cfg is not explicitly set?
yes, please commute these two as Tim says.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/37874
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3922bfad5c21dafc64fb05c7d9343b9835b58752
Gerrit-Change-Number: 37874
Gerrit-PatchSet: 5
Gerrit-Owner: Jamie Chen
jamie.chen@intel.com
Gerrit-Reviewer: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Jamie Chen
jamie.chen@intel.com
Gerrit-Reviewer: Kane Chen
kane.chen@intel.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Tim Wawrzynczak
twawrzynczak@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-CC: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Comment-Date: Wed, 08 Jan 2020 00:50:10 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Comment-In-Reply-To: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-MessageType: comment