Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7987
-gerrit
commit 2bb3a5521c36715cfd4a577821132e139a5ddf90 Author: Gabe Black gabeblack@google.com Date: Wed Apr 30 21:31:44 2014 -0700
drivers/pc80/mc146818rtc: Assume we always have ALTCENTURY
This patch has a rather twisted history. It was originally split off from a chromium patch, which moved ALTCENTURY to Kconfig. However, since we have no user without ALTCENTURY, we've agreed that the best way to proceed is to eliminate the non-ALTCENTURY case entirely.
The old commit message and identifiers are kept below for reference:
The availability of "ALTCENTURY" is now set through a kconfig variable so it can be available to the RTC driver without having to have a specialized interface.
BUG=None TEST=Built and booted on Link with the event log code modified to use the RTC interface. Verified that the event times were accurate. BRANCH=nyan
Original-Change-Id: Ifa807898e583254e57167fd44932ea86627a02ee Original-Signed-off-by: Gabe Black gabeblack@google.com Original-Reviewed-on: https://chromium-review.googlesource.com/197795 Original-Reviewed-by: David Hendricks dhendrix@chromium.org Original-Tested-by: Gabe Black gabeblack@chromium.org Original-Commit-Queue: Gabe Black gabeblack@chromium.org
This is the second half the following patch. (cherry picked from commit 9e0fd75142d29afe34f6c6b9ce0099f478ca5a93) Signed-off-by: Marc Jones marc.jones@se-eng.com
Change-Id: I8e871f31c3d4be7676abf9454ca90808d1ddca03 Signed-off-by: Alexandru Gagniuc mr.nuke.me@gmail.com --- src/drivers/pc80/mc146818rtc.c | 26 ++++++++++++-------------- src/include/pc80/mc146818rtc.h | 5 +---- src/include/rtc.h | 4 ++-- src/southbridge/amd/agesa/hudson/lpc.c | 2 +- src/southbridge/amd/cimx/sb700/late.c | 2 +- src/southbridge/amd/cimx/sb800/late.c | 2 +- src/southbridge/amd/cimx/sb900/late.c | 2 +- src/southbridge/amd/pi/avalon/lpc.c | 2 +- src/southbridge/amd/sb600/lpc.c | 2 +- src/southbridge/amd/sb700/lpc.c | 2 +- src/southbridge/amd/sb800/lpc.c | 2 +- 11 files changed, 23 insertions(+), 28 deletions(-)
diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 84abd43..eed6390 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -32,7 +32,7 @@ #endif
-static void cmos_reset_date(u8 has_century) +static void cmos_reset_date(void) { /* Now setup a default date equals to the build date */ struct rtc_time time = { @@ -45,7 +45,7 @@ static void cmos_reset_date(u8 has_century) bcd2bin(coreboot_build_date.year), .wday = bcd2bin(coreboot_build_date.weekday) }; - rtc_set(&time, has_century); + rtc_set(&time); }
#if CONFIG_USE_OPTION_TABLE @@ -123,7 +123,7 @@ void cmos_init(int invalid) cmos_write(0, i); #endif if (cmos_invalid) - cmos_reset_date(RTC_HAS_NO_ALTCENTURY); + cmos_reset_date();
printk(BIOS_WARNING, "RTC:%s%s%s%s\n", invalid?" Clear requested":"", @@ -325,12 +325,12 @@ enum cb_err set_option(const char *name, void *value) * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need * to make sure the date is valid. */ -void cmos_check_update_date(u8 has_century) +void cmos_check_update_date() { u8 year, century;
- /* Note: Need to check if the hardware supports RTC_CLK_ALTCENTURY. */ - century = has_century ? cmos_read(RTC_CLK_ALTCENTURY) : 0; + /* Assume hardware always supports RTC_CLK_ALTCENTURY. */ + century = cmos_read(RTC_CLK_ALTCENTURY); year = cmos_read(RTC_CLK_YEAR);
/* @@ -339,25 +339,23 @@ void cmos_check_update_date(u8 has_century) * if the date is valid. */ if (century > 0x99 || year > 0x99) /* Invalid date */ - cmos_reset_date(has_century); + cmos_reset_date(); }
-int rtc_set(const struct rtc_time *time, u8 has_century) -{ +int rtc_set(const struct rtc_time *time){ cmos_write(bin2bcd(time->sec), RTC_CLK_SECOND); cmos_write(bin2bcd(time->min), RTC_CLK_MINUTE); cmos_write(bin2bcd(time->hour), RTC_CLK_HOUR); cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH); cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH); cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR); - if (has_century) - cmos_write(bin2bcd(time->year / 100), - RTC_CLK_ALTCENTURY); + /* Same assumption as above: We always have RTC_CLK_ALTCENTURY */ + cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY); cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK); return 0; }
-int rtc_get(struct rtc_time *time, u8 has_century) +int rtc_get(struct rtc_time *time) { time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND)); time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE)); @@ -365,7 +363,7 @@ int rtc_get(struct rtc_time *time, u8 has_century) time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH)); time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH)); time->year = bcd2bin(cmos_read(RTC_CLK_YEAR)); - if (has_century) + if (CONFIG_DRIVERS_RTC_HAS_ALTCENTURY) time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100; else time->year += 2000; diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 3d65909..90ae7ae 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -94,9 +94,6 @@ #define RTC_CLK_YEAR 9 #define RTC_CLK_ALTCENTURY 0x32
-#define RTC_HAS_ALTCENTURY 1 -#define RTC_HAS_NO_ALTCENTURY 0 - /* On PCs, the checksum is built only over bytes 16..45 */ #define PC_CKS_RANGE_START 16 #define PC_CKS_RANGE_END 45 @@ -173,7 +170,7 @@ static inline void cmos_write32(u8 offset, u32 value)
#if !defined(__ROMCC__) void cmos_init(int invalid); -void cmos_check_update_date(u8 has_century); +void cmos_check_update_date(void); #if CONFIG_USE_OPTION_TABLE enum cb_err set_option(const char *name, void *val); enum cb_err get_option(void *dest, const char *name); diff --git a/src/include/rtc.h b/src/include/rtc.h index ed32b69..ba9a9c3 100644 --- a/src/include/rtc.h +++ b/src/include/rtc.h @@ -31,7 +31,7 @@ struct rtc_time int wday; };
-int rtc_set(const struct rtc_time *time, u8 has_century); -int rtc_get(struct rtc_time *time, u8 has_century); +int rtc_set(const struct rtc_time *time); +int rtc_get(struct rtc_time *time);
#endif /* _RTC_H_ */ diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c index 836966e..b784fc4 100644 --- a/src/southbridge/amd/agesa/hudson/lpc.c +++ b/src/southbridge/amd/agesa/hudson/lpc.c @@ -71,7 +71,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte);
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date();
/* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c index 9c70482..3fa6940 100644 --- a/src/southbridge/amd/cimx/sb700/late.c +++ b/src/southbridge/amd/cimx/sb700/late.c @@ -81,7 +81,7 @@ static void lpc_init(device_t dev) { printk(BIOS_DEBUG, "SB700 - Late.c - lpc_init - Start.\n");
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date();
/* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 9c4047f..d7f22d3 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -132,7 +132,7 @@ static void lpc_init(device_t dev) { printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n");
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date();
/* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c index 6f6a501..e9f5ad6 100644 --- a/src/southbridge/amd/cimx/sb900/late.c +++ b/src/southbridge/amd/cimx/sb900/late.c @@ -103,7 +103,7 @@ static void lpc_init(device_t dev) printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n"); /* SB Configure HPET base and enable bit */ //- hpetInit(sb_config, &(sb_config->BuildParameters)); - cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date();
/* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/pi/avalon/lpc.c b/src/southbridge/amd/pi/avalon/lpc.c index 1f60bc4..7b54cc3 100644 --- a/src/southbridge/amd/pi/avalon/lpc.c +++ b/src/southbridge/amd/pi/avalon/lpc.c @@ -70,7 +70,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte);
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date();
/* Initialize the real time clock. * The 0 argument tells cmos_init not to diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c index acee69d..dc2f31b 100644 --- a/src/southbridge/amd/sb600/lpc.c +++ b/src/southbridge/amd/sb600/lpc.c @@ -63,7 +63,7 @@ static void lpc_init(device_t dev) byte &= ~(1 << 1); pci_write_config8(dev, 0x78, byte);
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); }
static void sb600_lpc_read_resources(device_t dev) diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 26478b7..8ebc765 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -90,7 +90,7 @@ static void lpc_init(device_t dev) } #endif
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); }
void backup_top_of_ram(uint64_t ramtop) diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index f862a97..87c09a2 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -74,7 +74,7 @@ static void lpc_init(device_t dev) byte |= 1 << 0 | 1 << 3; pci_write_config8(dev, 0xBB, byte);
- cmos_check_update_date(RTC_HAS_ALTCENTURY); + cmos_check_update_date(); }
static void sb800_lpc_read_resources(device_t dev)