Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30734 )
Change subject: AGESA fam15tn boards: Clean up devicetree ......................................................................
Patch Set 3:
Patch Set 3: Code-Review+1
Finally I tested this change on my Lenovo G505S laptop and it still boots :) Compared to this board status report from the end of December - https://review.coreboot.org/cgit/board-status.git/tree/lenovo/g505s/4.9-8-g4... - there are no real changes at Linux kernel dmesg log, but now lspci -vvxxx shows a different PCI config space for 00:18.2 device, hopefully as expected and these differences below are okay (meld/kdiff3 to highlight)
I did not check closer yet, but some of those 0:18.2 registers are timestamps and trace records. I think they change for every boot and deal with DDR3 training.
Not something that this change would have anything to do with, even though commit mentions 0:18.2.
Please let me know if any further tests are needed ( are there any software tests for 00:18.2 device which I could run to verify its' functionality? )
It's really a no-op change wrt 0:18.2.