Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7625
-gerrit
commit 956aede3ccc1de672b304805bc9f686d41f7ec19 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Tue Dec 2 19:35:28 2014 +1100
mainboard/lenovo/g505s/Kconfig: Remove HUDSON_LEGACY_FREE
The Embedded Controller sits behind the LPC bridge and so needs LPC decodes to be enabled.
Remove the LPC decode enable out of agesawrapper.c. The enable is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)' which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3 LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.
Change-Id: I0b4e99cc0d6f89f0261f26ee61b8c175a373c730 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/lenovo/g505s/Kconfig | 4 ---- src/mainboard/lenovo/g505s/agesawrapper.c | 7 ------- 2 files changed, 11 deletions(-)
diff --git a/src/mainboard/lenovo/g505s/Kconfig b/src/mainboard/lenovo/g505s/Kconfig index fb753dc..fc3a6ac 100644 --- a/src/mainboard/lenovo/g505s/Kconfig +++ b/src/mainboard/lenovo/g505s/Kconfig @@ -68,8 +68,4 @@ config VGA_BIOS_ID string default "1002,990b"
-config HUDSON_LEGACY_FREE - bool - default y - endif # BOARD_LENOVO_G505S diff --git a/src/mainboard/lenovo/g505s/agesawrapper.c b/src/mainboard/lenovo/g505s/agesawrapper.c index 4cbaeaa..4417681 100644 --- a/src/mainboard/lenovo/g505s/agesawrapper.c +++ b/src/mainboard/lenovo/g505s/agesawrapper.c @@ -118,8 +118,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void) { AGESA_STATUS Status; UINT64 MsrReg; - UINT32 PciData; - PCI_ADDR PciAddress; AMD_CONFIG_PARAMS StdHeader;
/* @@ -136,11 +134,6 @@ AGESA_STATUS agesawrapper_amdinitmmio(void) MsrReg = MsrReg | 0x0000400000000000; LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
- /* For serial port */ - PciData = 0xFF03FFD5; - PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44); - LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); - /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull; LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);