[coreboot-gerrit] [XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MT6363 buck5 enable API

[Jarried Lin (Code Review)]

Attention is currently required from: Hope Wang.

Hello Hope Wang,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/85838?usp=email

to review the following change.

Change subject: soc/mediatek/mt8196: Correct MT6363 buck5 enable API
......................................................................

soc/mediatek/mt8196: Correct MT6363 buck5 enable API

MT6363 buck5 is not used in rauru/navi. Fixed the incorrect mask and
offset in the enable API.

TEST=build pass
BUG=b:365445188

Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5
Signed-off-by: Hope Wang 
---
M src/soc/mediatek/common/mt6363.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/85838/1

diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c
index 691282b..20ef9f0 100644
--- a/src/soc/mediatek/common/mt6363.c
+++ b/src/soc/mediatek/common/mt6363.c
@@ -211,7 +211,7 @@

void mt6363_enable_buck5(bool enable)
 {
-	mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x7, 0);
+	mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x1, 7);
 }

void mt6363_enable_vcn15(bool enable)