Patrick Rudolph (siro@das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18010
-gerrit
commit 29867964c8663c3d0d5db43e662104716e24ac94 Author: Arthur Heymans arthur@aheymans.xyz Date: Mon Jan 2 16:16:45 2017 +0100
mb/lenovo/t400: Implement hybrid graphic in romstage
The hybrid driver select by DRIVERS_LENOVO_HYBRID_GRAPHICS doesn't work for t400/t500. Replace it with a custom romstage implementation.
Tested on Lenovo T500 with dual graphics: * Intel Native GFX init * AMD VBios * GNU Linux 4.8.13 * SeaBios as payload * Discrete is working (44 W) * Integrated is working (24 W) * Switchable is working (34 W) ** Both GPUs are enabled, with Intel being connected to the panel ** DRI_PRIME allows to use AMD GPU ** ACPI doesn't seem to work (no vgaswitcheroo)
Depends on Change-Id: I4dc00005270240c048272b2e4f52ae46ba1c9422 Depends on Change-Id: If389016f3bb0c4c2fd0b826914997a87a9137201
Change-Id: I7496876e9b434d4a2388e1ede27ac604670339b7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Signed-off-by: Patrick Rudolph siro@das-labor.org --- src/mainboard/lenovo/t400/Kconfig | 1 - src/mainboard/lenovo/t400/Makefile.inc | 1 + src/mainboard/lenovo/t400/cmos.layout | 1 + src/mainboard/lenovo/t400/hybrid_graphics.c | 89 +++++++++++++++++++++++++++++ src/mainboard/lenovo/t400/romstage.c | 10 +++- 5 files changed, 99 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/lenovo/t400/Kconfig b/src/mainboard/lenovo/t400/Kconfig index f21f672..150199e 100644 --- a/src/mainboard/lenovo/t400/Kconfig +++ b/src/mainboard/lenovo/t400/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG select INTEL_INT15 select SUPERIO_NSC_PC87382 - select DRIVERS_LENOVO_HYBRID_GRAPHICS
config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc index b382efb..c02a70b 100644 --- a/src/mainboard/lenovo/t400/Makefile.inc +++ b/src/mainboard/lenovo/t400/Makefile.inc @@ -15,3 +15,4 @@
ramstage-y += dock.c ramstage-y += cstates.c +romstage-y += hybrid_graphics.c diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout index 61212dd..cf31453 100644 --- a/src/mainboard/lenovo/t400/cmos.layout +++ b/src/mainboard/lenovo/t400/cmos.layout @@ -142,6 +142,7 @@ enumerations 11 12 352M 12 0 Integrated Only 12 1 Discrete Only +12 2 Switchable
# ----------------------------------------------------------------- checksums diff --git a/src/mainboard/lenovo/t400/hybrid_graphics.c b/src/mainboard/lenovo/t400/hybrid_graphics.c new file mode 100644 index 0000000..dea986e --- /dev/null +++ b/src/mainboard/lenovo/t400/hybrid_graphics.c @@ -0,0 +1,89 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 secunet Security Networks AG + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <stdint.h> +#include <string.h> +#include <southbridge/intel/common/gpio.h> +#include <northbridge/intel/gm45/gm45.h> +#include <console/console.h> +#include <option.h> + +#define HYBRID_GRAPHICS_INTEGRATED_ONLY 0 +#define HYBRID_GRAPHICS_DISCRETE_ONLY 1 +#define HYBRID_GRAPHICS_SWITCHABLE 2 + +#define MUX_GPIO 22 +#define BCL_CTL_GPIO 19 +#define GFX_PWR_EN_GPIO 49 + +#define HYBRID_DETECT_GPIO 21 + +void hybrid_graphics_init(sysinfo_t *sysinfo); + +static bool hybrid_graphics_installed(void) +{ + if (get_gpio(HYBRID_DETECT_GPIO)) + return false; + else + return true; +} + +void hybrid_graphics_init(sysinfo_t *sysinfo) +{ + /* Set default mode */ + uint8_t hybrid_graphics_mode = 0xff; + + if (hybrid_graphics_installed()) { + get_option(&hybrid_graphics_mode, "hybrid_graphics_mode"); + printk(BIOS_DEBUG, "Hybrid graphics available: "); + } else + printk(BIOS_DEBUG, "Hybrid graphics not installed.\n"); + + /* Select appropriate hybrid graphics device */ + switch (hybrid_graphics_mode) { + case HYBRID_GRAPHICS_INTEGRATED_ONLY: + printk(BIOS_DEBUG, "Activating Integrated Only.\n"); + set_gpio(MUX_GPIO, GPIO_LEVEL_LOW); + set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_LOW); + set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_LOW); + + sysinfo->enable_igd = 1; + sysinfo->enable_peg = 0; + break; + case HYBRID_GRAPHICS_DISCRETE_ONLY: + printk(BIOS_DEBUG, "Activating Discrete Only.\n"); + set_gpio(MUX_GPIO, GPIO_LEVEL_HIGH); + set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_HIGH); + set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_HIGH); + + sysinfo->enable_igd = 0; + sysinfo->enable_peg = 1; + break; + case HYBRID_GRAPHICS_SWITCHABLE: + printk(BIOS_DEBUG, "Activating Switchable (both GPUs).\n"); + set_gpio(MUX_GPIO, GPIO_LEVEL_LOW); + set_gpio(BCL_CTL_GPIO, GPIO_LEVEL_LOW); + set_gpio(GFX_PWR_EN_GPIO, GPIO_LEVEL_HIGH); + + sysinfo->enable_igd = 1; + sysinfo->enable_peg = 1; + break; + default: + /* The display is not connected to a mux or switchable. */ + sysinfo->enable_igd = 1; + sysinfo->enable_peg = 0; + break; + } +} diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c index d110d4f..2a3a770 100644 --- a/src/mainboard/lenovo/t400/romstage.c +++ b/src/mainboard/lenovo/t400/romstage.c @@ -36,6 +36,8 @@ #define LPC_DEV PCI_DEV(0, 0x1f, 0) #define MCH_DEV PCI_DEV(0, 0, 0)
+void hybrid_graphics_init(sysinfo_t *sysinfo); + static void early_lpc_setup(void) { /* Set up SuperIO LPC forwards */ @@ -101,9 +103,13 @@ void mainboard_romstage_entry(unsigned long bist) memset(&sysinfo, 0, sizeof(sysinfo)); sysinfo.spd_map[0] = 0x50; sysinfo.spd_map[2] = 0x51; - sysinfo.enable_igd = 1; - sysinfo.enable_peg = 0; get_gmch_info(&sysinfo); + + /* Configure graphic GPIOs. + * Make sure there's a little delay between + * setup_pch_gpios() and this call ! */ + hybrid_graphics_init(&sysinfo); + raminit(&sysinfo, s3resume);
const u32 deven = pci_read_config32(MCH_DEV, D0F0_DEVEN);