[coreboot-gerrit] Change in coreboot[master]: mb/intel/shadowmountain: Add Cr50 support

[Furquan Shaikh (Code Review)]

Attention is currently required from: Paul Menzel, Aamir Bohra.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51086 )

Change subject: mb/intel/shadowmountain: Add Cr50 support
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Patch Set 5:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/51086/comment/6ac54395_4e42544c 
PS5, Line 13: Verify TPM init is done in ve
In the logs attached to b/182244857, there seem to be a lot of TPM IRQ timeout messages. Are those fixed now?

File src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c:

https://review.coreboot.org/c/coreboot/+/51086/comment/35d1b157_eb10c6a9 
PS5, Line 27: UP_20K
Why is this required?