Leroy P Leahy (leroy.p.leahy@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15011
-gerrit
commit 70064a5c6a94687b33d6af0ea82cac86939d54ca Author: Lee Leahy leroy.p.leahy@intel.com Date: Thu May 26 17:12:17 2016 -0700
Add Board Checklist Support
Build the <board>_checklist.html file which contains a checklist table for each stage of coreboot. This processing builds a set of implemented (done) routines which are marked green in the table. The remaining required routines (work-to-do) are marked red in the table and the optional routines are marked yellow in the table. The table heading for each stage contains a completion percentage in terms of count of routines (done .vs. required).
Add some Kconfig values: * CREATE_BOARD_CHECKLIST - When selected creates the checklist file * MAKE_CHECKLIST_PUBLIC - Copies the checklist file into the Documenation directory * CHECKLIST_DATA_FILE_LOCATION - Location of the checklist data files: * <stage>_complete.dat - Lists all of the weak routines * <stage>_optional.dat - Lists weak routines which may be optionally implemented * <stage>_exclude.dat - Lists the weak functions that should be ignored during the checklist processing
TEST=Build with Galileo Gen2.
Change-Id: Ie056f8bb6d45ff7f3bc6390b5630b5063f54c527 Signed-off-by: Lee Leahy leroy.p.leahy@intel.com --- Makefile.inc | 131 +++++++++++++++++++++ src/Kconfig | 8 ++ src/drivers/intel/fsp1_1/Kconfig | 4 + .../fsp/fsp1_1/checklist/ramstage_complete.dat | 17 +++ .../fsp/fsp1_1/checklist/ramstage_exclude.dat | 1 + .../fsp/fsp1_1/checklist/ramstage_optional.dat | 8 ++ .../fsp/fsp1_1/checklist/romstage_complete.dat | 13 ++ .../fsp/fsp1_1/checklist/romstage_exclude.dat | 1 + .../fsp/fsp1_1/checklist/romstage_optional.dat | 10 ++ .../fsp/fsp1_1/checklist/verstage_complete.dat | 10 ++ .../fsp/fsp1_1/checklist/verstage_exclude.dat | 1 + .../fsp/fsp1_1/checklist/verstage_optional.dat | 11 ++ 12 files changed, 215 insertions(+)
diff --git a/Makefile.inc b/Makefile.inc index 574f2fe..e2163b2 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -559,6 +559,137 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug mv $@.tmp $@
########################################################################### +# Build the board implementation checklist +########################################################################### + +%.weak: %.elf + nm $< | fgrep " W " | sed -r 's/^.{11}//' > $@.tmp + comm -23 $@.tmp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_exclude.dat > $@ + rm $@.tmp + +%.total: %.weak + cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_complete.dat $@.tmp + # If no separate verstage, combine verstage and romstage routines into a single list + if [ ! -e $(*D)/verstage.elf ]; \ + then \ + echo $(*F); \ + if [ "$(*F)" = "romstage" ]; \ + then \ + sort --merge $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_complete.dat $@.tmp > $@.tmp2; \ + sort -u $@.tmp2 > $@.tmp; \ + rm $@.tmp2; \ + fi; \ + fi + comm -23 $@.tmp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_exclude.dat > $@ + rm $@.tmp + +%.done: %.total %.weak + comm -23 $^ | sed "s/^[ \t]*//" > $@.tmp + comm -2 $@.tmp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat | sed "s/^[ \t]*//" > $@ + rm $@.tmp + +%.optional: %.done + comm -23 $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat $< | sed "s/^[ \t]*//" > $@ + +%.weak2: %.weak %.optional + comm -23 $< $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat | sed "s/^[ \t]*//" > $@ + +# Count the lines in the done file +done_lines = $$(wc -l $(*D)/$(basename $(*F)).done | sed 's/ .*//') + +# Count the lines in the optional file +optional_lines = $$(wc -l $(*D)/$(basename $(*F)).optional | sed 's/ .*//') + +# Count the lines in the total file +total_lines = $$(wc -l $(*D)/$(basename $(*F)).total | sed 's/ .*//') + +# Compute the percentage done by routine count +percent_complete = $$(($(done_lines) * 100 / ($(total_lines) - $(optional_lines)))) + +# Build the implementation table for each stage +%.html: %.optional %.done %.total %.weak2 + # + # Done table rows are in green + # + sed -e 's/^/<tr bgcolor=#c0ffc0><td>Required</td><td>/' $(*D)/$(basename $(*F)).done > $@.tmp + # + # Optional table rows are in yellow + # + sed -e 's/^/<tr bgcolor=#ffffc0><td>Optional</td><td>/' $(*D)/$(basename $(*F)).optional >> $@.tmp + # + # Weak table rows are in red + # + if [ -s $(*D)/$(basename $(*F)).weak2 ]; \ + then \ + sed -e 's/^/<tr bgcolor=#ffc0c0><td>Required</td><td>/' $(*D)/$(basename $(*F)).weak2 >> $@.tmp; \ + fi + # + # Add the table row termination + # + sed -e 's/$$/</td></tr>/' -i $@.tmp + # + # Sort the table into alphabetical order + # + sort -t ">" -k4 $@.tmp > $@.tmp2 + # + # Build the table + # + echo "<table border=1>" > $@ + echo "<tr><th colspan=2>$(basename $(*F)): $(percent_complete)% Done</th></tr>" >> $@ + echo "<tr><th>Type</th><th>Routine</td></tr>" >> $@ + cat $@.tmp2 >> $@ + echo "</table>" >> $@ + echo "<br>" >> $@ + rm $@.tmp $@.tmp2 + +html_table_files = $(objcbfs)/romstage.html $(objcbfs)/ramstage.html +list_of_html_files = $(subst _NEWLINE_,${\n},${html_table_files}) +current_date = $$(date +"%Y/%m/%d") + +# Build the web page from the implementation tables +$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(html_table_files) + # + # Add the header to the web page + # + echo "<html>" > $@ + echo "<head>" >> $@ + echo "<title>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status</title>" >> $@ + echo "</title>" >> $@ + echo "<body>" >> $@ + echo "<h1>$(CONFIG_MAINBOARD_PART_NUMBER) Implementation Status: $(current_date)</h1>" >> $@ + # + # Add the tables to the web page + # + for table in $(list_of_html_files); do \ + cat $$table >> $@; \ + done + # + # Add the trailer to the web page + # + echo "</body>" >> $@ + echo "</html>" >> $@ + +Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html: $(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html + if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR) ]; \ + then \ + mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR); \ + fi + if [ ! -d Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board ]; \ + then \ + mkdir Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board; \ + fi + cp $< $@ + +# Only build the checklist for boards under development +ifeq ($(CONFIG_CREATE_BOARD_CHECKLIST),y) +ifeq ($(CONFIG_MAKE_CHECKLIST_PUBLIC),y) +INTERMEDIATE+=Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html +else +INTERMEDIATE+=$(obj)/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html +endif +endif + +########################################################################### # Build the final rom image ###########################################################################
diff --git a/src/Kconfig b/src/Kconfig index f93c2cc..2b9a136 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1175,3 +1175,11 @@ config DEBUG_BOOT_STATE help Control debugging of the boot state machine. When selected displays the state boundaries in ramstage. + +config CREATE_BOARD_CHECKLIST + bool + default n + +config MAKE_CHECKLIST_PUBLIC + bool + default n diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index 9b2c463..86f6c7b 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -115,4 +115,8 @@ config VBT_FILE depends on GOP_SUPPORT default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/vbt.bin"
+config CHECKLIST_DATA_FILE_LOCATION + string + default "src/vendorcode/intel/fsp/fsp1_1/checklist" + endif #PLATFORM_USES_FSP1_1 diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_complete.dat new file mode 100644 index 0000000..55849ac --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_complete.dat @@ -0,0 +1,17 @@ +arch_segment_loaded +boot_device_init +fw_cfg_acpi_tables +lb_board +lb_framebuffer +mainboard_post +mainboard_silicon_init_params +mirror_payload +platform_prog_run +platform_segment_loaded +smbios_mainboard_bios_version +smbios_mainboard_manufacturer +smbios_mainboard_product_name +smbios_mainboard_serial_number +smbios_mainboard_set_uuid +smbios_mainboard_version +soc_after_silicon_init diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_exclude.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_exclude.dat new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_exclude.dat @@ -0,0 +1 @@ + diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_optional.dat new file mode 100644 index 0000000..29077c9 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/ramstage_optional.dat @@ -0,0 +1,8 @@ +arch_segment_loaded +boot_device_init +lb_board +lb_framebuffer +mainboard_post +mirror_payload +platform_prog_run +platform_segment_loaded diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat new file mode 100644 index 0000000..4f2932e --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_complete.dat @@ -0,0 +1,13 @@ +arch_segment_loaded +boot_device_init +mainboard_add_dimm_info +mainboard_check_ec_image +mainboard_memory_init_params +mainboard_post +mainboard_save_dimm_info +platform_prog_run +platform_segment_loaded +report_memory_config +soc_pre_ram_init +stage_cache_add +stage_cache_load_stage diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_exclude.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_exclude.dat new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_exclude.dat @@ -0,0 +1 @@ + diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat new file mode 100644 index 0000000..7660409 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat @@ -0,0 +1,10 @@ +arch_segment_loaded +boot_device_init +car_mainboard_post_console_init +car_mainboard_pre_console_init +mainboard_check_ec_image +mainboard_post +platform_prog_run +platform_segment_loaded +stage_cache_add +stage_cache_load_stage diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat new file mode 100644 index 0000000..7660409 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_complete.dat @@ -0,0 +1,10 @@ +arch_segment_loaded +boot_device_init +car_mainboard_post_console_init +car_mainboard_pre_console_init +mainboard_check_ec_image +mainboard_post +platform_prog_run +platform_segment_loaded +stage_cache_add +stage_cache_load_stage diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_exclude.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_exclude.dat new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_exclude.dat @@ -0,0 +1 @@ + diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat new file mode 100644 index 0000000..b1ddfb6 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/verstage_optional.dat @@ -0,0 +1,11 @@ +arch_segment_loaded +boot_device_init +car_mainboard_post_console_init +car_mainboard_pre_console_init +mainboard_check_ec_image +mainboard_post +platform_prog_run +platform_segment_loaded +stage_cache_add +stage_cache_load_stage +