Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48475 )
Change subject: soc/amd/cezanne: add basic early FCH initialization to bootblock ......................................................................
soc/amd/cezanne: add basic early FCH initialization to bootblock
Change-Id: I1c6d32a5498a7adcee3c8c3145f85e9dba26bf7e Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/48475 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/cezanne/bootblock.c A src/soc/amd/cezanne/early_fch.c M src/soc/amd/cezanne/include/soc/southbridge.h 4 files changed, 28 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index df3355e..946e480 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -5,6 +5,7 @@ all-y += config.c
bootblock-y += bootblock.c +bootblock-y += early_fch.c
romstage-y += romstage.c
diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c index 7fe9f81..8e1bff0 100644 --- a/src/soc/amd/cezanne/bootblock.c +++ b/src/soc/amd/cezanne/bootblock.c @@ -3,6 +3,7 @@ #include <amdblocks/amd_pci_mmconf.h> #include <bootblock_common.h> #include <cpu/x86/tsc.h> +#include <soc/southbridge.h> #include <stdint.h>
asmlinkage void bootblock_c_entry(uint64_t base_timestamp) @@ -20,8 +21,10 @@
void bootblock_soc_early_init(void) { + fch_pre_init(); }
void bootblock_soc_init(void) { + fch_early_init(); } diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c new file mode 100644 index 0000000..6616d07 --- /dev/null +++ b/src/soc/amd/cezanne/early_fch.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/acpimmio.h> +#include <amdblocks/smbus.h> +#include <console/console.h> +#include <soc/southbridge.h> + +/* Before console init */ +void fch_pre_init(void) +{ + enable_acpimmio_decode_pm04(); + fch_smbus_init(); + fch_enable_cf9_io(); + fch_enable_legacy_io(); +} + +/* After console init */ +void fch_early_init(void) +{ + fch_print_pmxc0_status(); +} diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index 0f26ff0..2456ebc 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -5,4 +5,7 @@
#include <soc/iomap.h>
+void fch_pre_init(void); +void fch_early_init(void); + #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */