Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43470 )
Change subject: [WIP] common sb/intel fadt ......................................................................
[WIP] common sb/intel fadt
Change-Id: I6b995d526d6781d1f53c017068ed83ea46a93f32 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc A src/southbridge/intel/common/fadt.c A src/southbridge/intel/common/fadt.h 4 files changed, 81 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/43470/1
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 9356a2b..a3095bc 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -52,6 +52,9 @@ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
+config SOUTHBRIDGE_INTEL_COMMON_ACPI_FADT + bool + config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT bool
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index b3c48fa..77f0795 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -35,6 +35,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
+ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_FADT) += fadt.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c diff --git a/src/southbridge/intel/common/fadt.c b/src/southbridge/intel/common/fadt.c new file mode 100644 index 0000000..31feff6 --- /dev/null +++ b/src/southbridge/intel/common/fadt.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <cpu/x86/smm.h> +#include <southbridge/intel/common/fadt.h> +#include <southbridge/intel/common/pmbase.h> + +/* FIXME: pmutil.h definitions are a mess */ +#define PM1_STS 0x00 +#define PM1_CNT 0x04 +#define PM1_TMR 0x08 +#define GPE0_STS 0x20 +#define PM2_CNT 0x50 + +#define PM1A_EVT_BYTES 4 +#define PM1A_CNT_BYTES 2 +#define PM2_CNT_BYTES 1 +#define PM_TMR_BYTES 4 +#define GPE0_BYTES 16 + +void acpi_fill_fadt(acpi_fadt_t *fadt) +{ + const u16 pmbase = lpc_get_pmbase(); + + fadt->pm1a_evt_blk = pmbase + PM1_STS; + fadt->pm1a_cnt_blk = pmbase + PM1_CNT; + fadt->pm2_cnt_blk = pmbase + PM2_CNT; + fadt->pm_tmr_blk = pmbase + PM1_TMR; + fadt->gpe0_blk = pmbase + GPE0_STS; + + fadt->pm1_evt_len = 4; + fadt->pm1_cnt_len = 2; + fadt->pm2_cnt_len = 1; + fadt->pm_tmr_len = 4; + fadt->gpe0_blk_len = 16; + + fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1a_evt_blk.bit_width = 32; + fadt->x_pm1a_evt_blk.bit_offset = 0; + fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; + fadt->x_pm1a_evt_blk.addrl = pmbase; + fadt->x_pm1a_evt_blk.addrh = 0x0; + + fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm1a_cnt_blk.bit_width = 16; + fadt->x_pm1a_cnt_blk.bit_offset = 0; + fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; + fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; + fadt->x_pm1a_cnt_blk.addrh = 0x0; + + fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm2_cnt_blk.bit_width = 8; + fadt->x_pm2_cnt_blk.bit_offset = 0; + fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; + fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; + fadt->x_pm2_cnt_blk.addrh = 0x0; + + fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_pm_tmr_blk.bit_width = 32; + fadt->x_pm_tmr_blk.bit_offset = 0; + fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; + fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; + fadt->x_pm_tmr_blk.addrh = 0x0; + + fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; + fadt->x_gpe0_blk.bit_width = 128; + fadt->x_gpe0_blk.bit_offset = 0; + fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; + fadt->x_gpe0_blk.addrl = pmbase + 0x20; + fadt->x_gpe0_blk.addrh = 0x0; +} diff --git a/src/southbridge/intel/common/fadt.h b/src/southbridge/intel/common/fadt.h new file mode 100644 index 0000000..48fe1cd --- /dev/null +++ b/src/southbridge/intel/common/fadt.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOUTHBRIDGE_INTEL_COMMON_FADT_H +#define SOUTHBRIDGE_INTEL_COMMON_FADT_H + +#endif /* SOUTHBRIDGE_INTEL_COMMON_FADT_H */