build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32513 )
Change subject: soc/intel/cannonlake: Support different SPD read type for each slot ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/#/c/32513/9/src/mainboard/google/hatch/romstage.... File src/mainboard/google/hatch/romstage.c:
https://review.coreboot.org/#/c/32513/9/src/mainboard/google/hatch/romstage.... PS9, Line 57: /* trailing whitespace
https://review.coreboot.org/#/c/32513/9/src/mainboard/google/hatch/romstage.... PS9, Line 65: memcfg.spd[2].read_type = READ_SPD_CBFS; trailing whitespace