build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48383 )
Change subject: mb/fujitsu/d3410-b1: Add new mainboard ......................................................................
Patch Set 8:
(27 comments)
File src/mainboard/fujitsu/d3410-b1/gpio.c:
https://review.coreboot.org/c/coreboot/+/48383/comment/28902632_12b225a3 PS8, Line 12: _PAD_CFG_STRUCT(GPP_A23, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/6fd4dc9f_c8565b8e PS8, Line 15: _PAD_CFG_STRUCT(GPP_B12, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/86859107_444c0349 PS8, Line 16: _PAD_CFG_STRUCT(GPP_B13, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/9c97b312_53f0db56 PS8, Line 17: _PAD_CFG_STRUCT(GPP_B14, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/5fd87857_502cb4cd PS8, Line 19: _PAD_CFG_STRUCT(GPP_B18, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/4ae83277_3926b6fd PS8, Line 20: _PAD_CFG_STRUCT(GPP_B22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/67fdb117_0353dfa5 PS8, Line 21: _PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/276b6adf_e6531da2 PS8, Line 24: _PAD_CFG_STRUCT(GPP_C0, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/1eab4f94_cc2d7b30 PS8, Line 25: _PAD_CFG_STRUCT(GPP_C1, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/7ae5393c_57bd12e3 PS8, Line 26: _PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/12e09885_2c5d777c PS8, Line 27: _PAD_CFG_STRUCT(GPP_C3, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/9924e763_d306f165 PS8, Line 28: _PAD_CFG_STRUCT(GPP_C4, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/3ff4479f_eeda1e7c PS8, Line 29: _PAD_CFG_STRUCT(GPP_C5, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/128b6022_56d3ed12 PS8, Line 30: _PAD_CFG_STRUCT(GPP_C8, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/d1c8ca03_502d0c03 PS8, Line 31: _PAD_CFG_STRUCT(GPP_C9, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/46befee5_3048e308 PS8, Line 32: _PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/5e5625e3_4f49ce29 PS8, Line 37: _PAD_CFG_STRUCT(GPP_D14, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/80c18a1b_e8c79bf2 PS8, Line 38: _PAD_CFG_STRUCT(GPP_D15, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/73f5ea4c_ddce8b24 PS8, Line 39: _PAD_CFG_STRUCT(GPP_D18, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(UP_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/8f44d5cc_bf664395 PS8, Line 42: _PAD_CFG_STRUCT(GPP_E8, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/bed1a2d9_8f8de46a PS8, Line 43: _PAD_CFG_STRUCT(GPP_E9, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/8443ede2_db9f83dc PS8, Line 44: _PAD_CFG_STRUCT(GPP_E10, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/2adf39d3_37465cf6 PS8, Line 45: _PAD_CFG_STRUCT(GPP_E11, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/85b4140a_73e934ae PS8, Line 46: _PAD_CFG_STRUCT(GPP_E12, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/71bfe45c_d1c17a8f PS8, Line 57: _PAD_CFG_STRUCT(GPP_H0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K)), line over 96 characters
https://review.coreboot.org/c/coreboot/+/48383/comment/82ef93c4_f4e9e45b PS8, Line 60: _PAD_CFG_STRUCT(GPP_H12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_BUF(TX_RX_DISABLE) | 1, PAD_PULL(DN_20K)), line over 96 characters
File src/mainboard/fujitsu/d3410-b1/romstage.c:
https://review.coreboot.org/c/coreboot/+/48383/comment/9b33b2c9_569f373f PS8, Line 18: FSP_M_CONFIG *const mem_cfg = &mupd->FspmConfig; need consistent spacing around '*' (ctx:WxV)