[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy: Rework OV13858 power on sequence

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36744 )

Change subject: mb/google/poppy: Rework OV13858 power on sequence
......................................................................

mb/google/poppy: Rework OV13858 power on sequence

In particular:

- Set voltage before enabling regulators

- Enable regulators and the clock without any sleeping in between. There's
  no need to wait there.

- Sleep 1 ms in order to wait for regulator voltages settling before
  lifting xshutdown.

BUG=chromium:959232

Signed-off-by: Sakari Ailus 
Tested-by: Jacopo Mondi 
Change-Id: I0f8857ae369d5038f293a0e2c48c681df535ad86
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36744
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Georgi 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
1 file changed, 17 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Georgi: Looks good to me, approved
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
index 355b255..fc23d06 100644
--- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
+++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/acpi/camera_pmic.asl
@@ -468,23 +468,33 @@
    						C0GP = 1
    					}

-						VACT = 1
    					if (LNotEqual (ACVA, 109)) {
    						/* Set ANA at 2.8152V */
    						ACVA = 109
    					}
-						Sleep(3)
+						VACT = 1

-						_SB.PCI0.I2C2.PMIC.CLKE()
-						CLE0 = 1
-
-						VDCT = 1
    					if (LNotEqual (DCVA, 12)) {
    						/* Set CORE at 1.2V */
    						DCVA = 12
    					}
-						Sleep(3)
+						VDCT = 1
+
+						_SB.PCI0.I2C2.PMIC.CLKE()
+						CLE0 = 1
+
+						/*
+						 * Wait for all regulator
+						 * outputs to settle.
+						 */
+						Sleep(1)
+
    					_SB.PCI0.I2C2.PMIC.CRST(1)
+
+						/*
+						 * 5 ms needed before
+						 * streaming on.
+						 */
    					Sleep(5)

STA = 1