[coreboot-gerrit] Change in coreboot[master]: mb/google/volteer: Enable DPTF functionality

[Caveh Jalali (Code Review)]

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39345 )

Change subject: mb/google/volteer: Enable DPTF functionality
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Patch Set 8:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39345/8/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/39345/8/src/mainboard/google/voltee... 
PS8, Line 168: 60
> Yes, sure. We have shared required info on this issue tracker.  […]

based on the discussion, it sounds like we need different PL2 values
here depending on the CPU class used.  a given variant could be
built with either CPU, so this needs to be determined at boot time.

we did something similar for previous SoCs:

https://review.coreboot.org/c/coreboot/+/27765/
https://review.coreboot.org/27997
https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+...

does TGL have some ID regs we can use to decide which
recommended PL2 value should be configured?