build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62070 )
Change subject: KGPE-D16: Add minimal source for bootblock from 4.11_branch ......................................................................
Patch Set 1:
(223 comments)
File src/mainboard/asus/kgpe-d16/acpi_tables.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/17239718_d6f2c723 PS1, Line 48: current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sr5650, line over 96 characters
File src/mainboard/asus/kgpe-d16/bootblock.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/365897e5_d409d9d5 PS1, Line 30: /* Recovery jumper is connected to SP5100 GPIO61, and clears the GPIO when placed in the Recovery position */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/37d6cad6_72928519 PS1, Line 38: for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) { braces {} are not necessary for single statement blocks
File src/northbridge/amd/amdfam10/acpi.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/2505ae74_6a9ffe5f PS1, Line 39: if (!cpu->enabled) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/20a00153_0930d7f0 PS1, Line 42: current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, cpu_index, flags, lint); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/91cd4488_87dad390 PS1, Line 58: if (!cpu->enabled) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/558e0b43_9821f45f PS1, Line 61: printk(BIOS_DEBUG, "SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b5e9969f_f042c2df PS1, Line 62: current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.apic.node_id, cpu->path.apic.apic_id); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7e15cd10_44ba39c5 PS1, Line 71: if (value < (1ULL << 42)) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/5080826d_3da85d7c PS1, Line 90: printk(BIOS_DEBUG, "set_srat_mem: dev %s, res->index=%04lx startk=%08lx, sizek=%08lx\n", Prefer using '"%s...", __func__' to using 'set_srat_mem', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b121c64e_a32016dc PS1, Line 97: if ((basek+sizek)<1024) return; spaces required around that '<' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c97b2c2c_8900c1c6 PS1, Line 97: if ((basek+sizek)<1024) return; trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6a67d1b4_868f9444 PS1, Line 105: if (res->index > 0xf) /* Exclude MMIO resources, e.g. as set in northbridge.c amdfam10_domain_read_resources() */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ffdb0af0_0425323b PS1, Line 106: state->current += acpi_create_srat_mem((acpi_srat_mem_t *)state->current, (res->index & 0xf), basek, sizek, 1); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/46171f65_3e47c855 PS1, Line 155: int i,j; space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/2c6fcfd4_0c0256c9 PS1, Line 184: if (i < 7) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/608012dd_b2c2c88d PS1, Line 222: for (i = 0; i < HC_NUMS; i++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f63b51f8_532a7523 PS1, Line 232: for (i = 0; i<(HC_NUMS*2); i++) { // FIXME: change to more chain spaces required around that '<' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/740ea238_5cde099d PS1, Line 274: for (i = 0; i < sysconf.hc_possible_num; i++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/06a1d910_e1a3c4bb PS1, Line 277: for (i = sysconf.hc_possible_num; i < HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8 line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7dc27561_69dba7c5 PS1, Line 287: for (i = 0; i < sysconf.hc_possible_num; i++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3f238347_c167d7f4 PS1, Line 290: for (i = sysconf.hc_possible_num; i < HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8 line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d76a1fea_fd2870a7 PS1, Line 312: if ((CONFIG_CBB == 0xff) && (sysconf.nodes > 32)) { suspect code indent for conditional statements (8, 17)
File src/northbridge/amd/amdfam10/bootblock.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/51ec6ea5_c8080eb0 PS1, Line 16: static void bootblock_northbridge_init(void) { open brace '{' following function definitions go on the next line
File src/northbridge/amd/amdfam10/early_ht.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ee0cfa44_10200708 PS1, Line 69: id = pci_io_read_config32(PCI_DEV(0,0,0), PCI_VENDOR_ID); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/fa2920a0_9d3482b6 PS1, Line 69: id = pci_io_read_config32(PCI_DEV(0,0,0), PCI_VENDOR_ID); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/9c916f42_ab4867ee PS1, Line 71: if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/787ebfe3_48be3577 PS1, Line 78: hdr_type = pci_io_read_config8(PCI_DEV(0,0,0), PCI_HEADER_TYPE); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/89c507be_237a4ffa PS1, Line 78: hdr_type = pci_io_read_config8(PCI_DEV(0,0,0), PCI_HEADER_TYPE); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/05cb686d_c54ff5a3 PS1, Line 82: if ((hdr_type == PCI_HEADER_TYPE_NORMAL) || that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/fd4ea44f_453a9b29 PS1, Line 85: pos = pci_io_read_config8(PCI_DEV(0,0,0), PCI_CAPABILITY_LIST); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/fc2013be_31fb2dcf PS1, Line 85: pos = pci_io_read_config8(PCI_DEV(0,0,0), PCI_CAPABILITY_LIST); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/38860844_6f7751c5 PS1, Line 89: cap = pci_io_read_config8(PCI_DEV(0,0,0), pos + PCI_CAP_LIST_ID); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/cadccdb8_f8ee9c27 PS1, Line 89: cap = pci_io_read_config8(PCI_DEV(0,0,0), pos + PCI_CAP_LIST_ID); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/14a68b09_400a12b0 PS1, Line 95: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d02e9e53_39ba6059 PS1, Line 95: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a4e29632_3d2ee5fd PS1, Line 95: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4765b134_caca62c5 PS1, Line 96: pci_io_write_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS, flags); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1888ea2d_14841810 PS1, Line 96: pci_io_write_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS, flags); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/afcfd3d0_48034120 PS1, Line 96: pci_io_write_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS, flags); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7e68b2dc_cc5a92ff PS1, Line 97: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/48e4df3d_245e9ad8 PS1, Line 97: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f99b3c66_e2a23685 PS1, Line 97: flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6c872c88_37fa3dd8 PS1, Line 105: if (!end_used) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e8a568c3_c0eae12a PS1, Line 106: next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8cd6b930_acc179b0 PS1, Line 108: } else { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6928149c_c02cf00c PS1, Line 126: pci_io_write_config16(PCI_DEV(0, 0, 0), pos + PCI_CAP_FLAGS, flags); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a9a321c6_b4e8671c PS1, Line 129: ctrl_off = ((flags >> 10) & 1)? spaces required around that '?' (ctx:VxE)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f2f4aad7_48d1ad5b PS1, Line 133: ctrl = pci_io_read_config16(devx, pos + ctrl_off); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/63bf58a0_28fe278c PS1, Line 134: /* Is this the end of the hypertransport chain? */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/aa87a813_4a1e4057 PS1, Line 135: if (ctrl & (1 << 6)) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/9d5a57b5_b8687e1f PS1, Line 135: if (ctrl & (1 << 6)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/de817c12_7d526d9a PS1, Line 139: if (ctrl & ((1 << 4) | (1 << 8))) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e2c23399_54352578 PS1, Line 141: * Either the link has failed, or we have line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0fa9d7b2_776f318b PS1, Line 144: * retrain, so lets knock it down and see line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a6f37bb9_fd0dbb09 PS1, Line 147: ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/47e50c52_803c1298 PS1, Line 147: ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc need consistent spacing around '<<' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/5d7cc057_dc557f22 PS1, Line 148: pci_io_write_config16(devx, pos + ctrl_off, ctrl); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d1c6213d_e6eaa3aa PS1, Line 149: ctrl = pci_io_read_config16(devx, pos + ctrl_off); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d1e0e5f9_48e4c8d4 PS1, Line 150: if (ctrl & ((1 << 4) | (1 << 8))) { Too many leading tabs - consider code refactoring
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/5ff8681b_042280ab PS1, Line 164: out: ; space prohibited before semicolon
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3b9d7558_4b2b73aa PS1, Line 166: if ((ht_dev_num > 1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) { line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/05aa1a89_75bda61f PS1, Line 168: flags = pci_io_read_config16(PCI_DEV(0,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4ba5a100_1fe4e440 PS1, Line 168: flags = pci_io_read_config16(PCI_DEV(0,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a2f08fb3_3446e500 PS1, Line 168: flags = pci_io_read_config16(PCI_DEV(0,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f0e9a478_647b14e0 PS1, Line 171: pci_io_write_config16(PCI_DEV(0, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags); line over 96 characters
File src/northbridge/amd/amdfam10/northbridge.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/94446cec_2b3ae6ee PS1, Line 5: * Copyright (C) 2015 - 2017 Timothy Pearson tpearson@raptorengineering.com, Raptor Engineering line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/717c5ac3_dad17d3b PS1, Line 70: if ((CONFIG_CDB + nodeid) < 32) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3c3f8f29_5348d655 PS1, Line 92: if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c58e4115_f38a2a24 PS1, Line 112: if (dev && dev->enabled) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ffc2fcb3_fa5ab3ad PS1, Line 123: if (busn != CONFIG_CBB) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8071ed34_a67fc6df PS1, Line 215: printk(BIOS_DEBUG, "amdfam10_scan_chain(): node %d (internal node ID %d): skipping defective HT link\n", nodeid, internal_node_number); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8214c0e8_2969765b PS1, Line 219: printk(BIOS_DEBUG, "amdfam10_scan_chain(): node %d (internal node ID %d): skipping defective HT link\n", nodeid, internal_node_number); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1181b8ab_21977ec3 PS1, Line 351: /* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/cad2ad8d_1b3e67b4 PS1, Line 376: for (link = 0; !res && (link < 8); link++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6f4e84bf_a7eb2f2f PS1, Line 383: if ( (goal_link == (link - 1)) && space prohibited after that open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/456b2a89_4c1dbc78 PS1, Line 392: static struct resource *amdfam10_find_iopair(struct device *dev, unsigned int nodeid, unsigned int link) line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/18c02c6e_18adfb05 PS1, Line 409: if (reg > 0xd8) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/73fcea26_f4fb9123 PS1, Line 414: if (!reg) { suspicious code indentation after conditional statements
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/bbfe1c19_b47795ca PS1, Line 415: //because of Extend conf space, we will never run out of reg, but we need one index to differ them. so same node and same link can have multi range line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/9f03bf5b_d3ffe5d8 PS1, Line 417: reg = 0x110+ (index<<24) + (4<<20); // index could be 0, 255 need consistent spacing around '+' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b051f7b3_4a5a89ee PS1, Line 442: if (reg > 0xb8) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/25a37d85_6a4b428d PS1, Line 452: reg = 0x110+ (index<<24) + (6<<20); // index could be 0, 63 need consistent spacing around '+' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/377f7f8e_9c635b49 PS1, Line 507: if (link->children) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/23f3cbe6_d7de6db3 PS1, Line 521: if (!(resource->flags & IORESOURCE_ASSIGNED)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/85c66dbb_ccc68a86 PS1, Line 526: if (resource->flags & IORESOURCE_STORED) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a28cf127_d12c156b PS1, Line 535: if ((resource->index & 0xffff) < 0x1000) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6c89be6f_aa97b908 PS1, Line 551: store_conf_io_addr(nodeid, link_num, reg, (resource->index >> 24), rbase>>8, rend>>8); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b859a4cc_0a763944 PS1, Line 553: set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes); // [39:8] line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/db1357e6_b098953e PS1, Line 553: set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes); // [39:8] need consistent spacing around '>>' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/121fafe5_a42cd815 PS1, Line 554: store_conf_mmio_addr(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/73db1840_1a1d6a86 PS1, Line 554: store_conf_mmio_addr(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8); need consistent spacing around '>>' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d64ec3d6_00e87f0e PS1, Line 577: extern struct device *vga_pri; // the primary vga device, defined in device.c line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/5901e4db_566d93f0 PS1, Line 578: printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary, line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e0cc57a7_ea1e81f4 PS1, Line 579: link->secondary,link->subordinate); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ace77954_1bfb143b PS1, Line 581: if ((vga_pri->bus->secondary >= link->secondary) && suspect code indent for conditional statements (24, 24)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d06858f7_732b5468 PS1, Line 592: printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", dev_path(dev), nodeid, link->link_num); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/55856d42_0f748dc4 PS1, Line 620: for (res = dev->resource_list; res; res = res->next) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/619fe47b_b9e79e8d PS1, Line 625: if (bus->children) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c13a2dfd_08034908 PS1, Line 694: for (reg = 0x80; reg <= 0xd8; reg+= 0x08) { spaces required around that '+=' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ba3cd845_d984ea62 PS1, Line 713: if (res) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/82b1c625_702d48d6 PS1, Line 727: /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/45316662_8ffd254c PS1, Line 755: if ((!node_dev) || (pci_read_config32(node_dev, PCI_VENDOR_ID) == 0xffffffff)) line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ede49dd6_bcbeabae PS1, Line 760: dword = pci_read_config32(get_node_pci(node, 1), 0x40 + (range * 0x8)); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/23f9f1d4_82172b26 PS1, Line 767: dword = pci_read_config32(get_node_pci(node, 1), 0x44 + (range * 0x8)); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c8d98fd0_ddedee87 PS1, Line 768: dword2 = pci_read_config32(get_node_pci(node, 1), 0x144 + (range * 0x8)); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1a85d24c_b6f2cf99 PS1, Line 787: * The BKDG appears to be incorrect as to the location of the CC6 save region line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f7e9c5cb_b77e6029 PS1, Line 788: * lower boundary on non-interleaved systems, causing lockups on attempted write line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/873c67f8_a1903efe PS1, Line 791: * For now, work around by allocating the maximum possible CC6 save region size. line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8f894754_0cb23e36 PS1, Line 793: * Determine if this is a BKDG error or a setup problem and remove this warning! line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/dd98dca3_f07916b4 PS1, Line 796: max_range_limit = (((uint64_t)(pci_read_config32(get_node_pci(max_node, 1), 0x124) & 0x1fffff)) << 27) - 1; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d604c330_da69ac39 PS1, Line 798: printk(BIOS_INFO, "Reserving CC6 save segment base: %08llx size: %08llx\n", (max_range_limit + 1), qword); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/31071473_d8868be3 PS1, Line 811: if (min && tolm > min->base) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/64d28301_fabb1caf PS1, Line 836: if (!(d.mask & 1)) continue; // no memory on this node trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/053d03fc_39d2a1bf PS1, Line 849: if (mem_hole.node_id==-1) { spaces required around that '==' (ctx:VxO)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/2b63b7fd_c15f0fb7 PS1, Line 849: if (mem_hole.node_id==-1) { space required before that '-' (ctx:OxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/15f57a5c_2a1ba917 PS1, Line 855: if (!(d.base & 1)) continue; trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3492f7fe_4a08780e PS1, Line 857: base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; need consistent spacing around '<<' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/421e8b17_a2834596 PS1, Line 858: if (base_k > 4 *1024 * 1024) break; // don't need to go to check need consistent spacing around '*' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/be66c948_75723553 PS1, Line 858: if (base_k > 4 *1024 * 1024) break; // don't need to go to check trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/49f9ade4_3fbd30c8 PS1, Line 860: mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3cb6b9b2_2a43807c PS1, Line 865: limit_k = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d2aabaed_b2c28b0b PS1, Line 898: for (link = dev->link_list; link; link = link->next) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d7039ebc_c714128d PS1, Line 906: mmio_basek &= ~((1 << 6) -1); need consistent spacing around '-' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e4250044_1a9b99c6 PS1, Line 923: if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/efc5f998_27cf1e92 PS1, Line 935: if (!(d.mask & 1)) continue; trailing statements should be on next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1c66b772_4a5dd9f7 PS1, Line 936: basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/04cf8cc5_3a55e705 PS1, Line 980: if (link->children) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a9aa59d5_50256045 PS1, Line 992: for (reg = 0xe0; reg <= 0xec; reg += 4) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/493944b8_f014ce1a PS1, Line 1013: if (!dev->link_list->disable_relaxed_ordering) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e24fcb4b_e1395d11 PS1, Line 1018: (!dev->link_list->disable_relaxed_ordering)? spaces required around that '?' (ctx:VxE)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ff6f217e_692961f6 PS1, Line 1056: t->memory_error_information_handle = 0xFFFE; /* no error information handle available */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/56e763f2_f1748592 PS1, Line 1076: switch (speed) { switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/de746f95_ad1a4a26 PS1, Line 1097: switch (speed) { switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/aa02415b_7a2f4bcb PS1, Line 1112: switch (speed) { switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a2a91fb2_3c24b811 PS1, Line 1153: max_speed = amdmct_mct_speed_enum_to_mhz(mem_info->dct_stat[node].DIMMAutoSpeed); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/fbd9fce6_bfabd51c PS1, Line 1185: dimm_size_bytes = ((width / chip_width) * chip_size * ranks) / 8; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/33cd77bf_99b7e7c2 PS1, Line 1188: dimm_size_bytes = width * (1ULL << rows) * (1ULL << cols) * banks * ranks; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/557740fa_ab620567 PS1, Line 1201: t->size &= (~0x8000); /* size specified in megabytes */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/22733b51_3e226c51 PS1, Line 1207: t->attributes |= ranks & 0xf; /* rank number is stored in the lowest 4 bits of the attributes field */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e32bd41d_e31f6a7a PS1, Line 1210: snprintf(string_buffer, sizeof(string_buffer), "NODE %d DIMM_%s%d", node >> 1, line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/51bc3e91_9361b019 PS1, Line 1211: (mem_info->dct_stat[node].Internal_Node_ID)?((slot & 0x1)?"D":"C"):((slot & 0x1)?"B":"A"), (slot >> 1) + 1); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/29cd3a6b_168d9304 PS1, Line 1213: snprintf(string_buffer, sizeof(string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/13437a67_ceffa814 PS1, Line 1227: smbios_fill_dimm_manufacturer_from_id(mem_info->dct_stat[node].DimmManufacturerID[slot], t); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3d065553_1154f067 PS1, Line 1228: t->part_number = smbios_add_string(t->eos, mem_info->dct_stat[node].DimmPartNumber[slot]); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4add5470_132f0d2c PS1, Line 1232: snprintf(string_buffer, sizeof(string_buffer), "%08X", mem_info->dct_stat[node].DimmSerialNumber[slot]); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d22e1687_21fda558 PS1, Line 1233: t->serial_number = smbios_add_string(t->eos, string_buffer); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/9d0b2a68_327c1b32 PS1, Line 1236: /* JEDEC specifies 1.8V only, so assume that the memory is configured for 1.8V */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1b3c56b3_4476c4ea PS1, Line 1243: uint8_t supported_voltages = mem_info->dct_stat[node].DimmSupportedVoltages[slot]; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e6ae739f_10296f1e PS1, Line 1244: uint8_t configured_voltage = mem_info->dct_stat[node].DimmConfiguredVoltage[slot]; line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/66b2a505_87d2a618 PS1, Line 1274: t->memory_error_information_handle = 0xFFFE; /* no error information handle available */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/230d980a_18cc8838 PS1, Line 1330: for (ht_c_index = 0; ht_c_index < 32; ht_c_index++) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b3d57ed5_286ab1c7 PS1, Line 1347: if (pci_read_config32(dev, 0x68) & (HTTC_APIC_EXT_ID|HTTC_APIC_EXT_BRD_CST)) that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a4d2db0a_736feffc PS1, Line 1387: int i,j; space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/20d0d0e7_47d158d0 PS1, Line 1398: if (ApicIdCoreIdSize) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0b17df44_d99eafdb PS1, Line 1418: printk(BIOS_DEBUG, "\n%s move to ",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7bb87159_82c713aa PS1, Line 1420: printk(BIOS_DEBUG, "%s",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/33ca35ad_973e747c PS1, Line 1434: if ((pci_domain->link_list) && (pci_domain->link_list->children == dev_mc)) { line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8cd4bb28_04c41a3d PS1, Line 1435: printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/51a12ecf_21ce49db PS1, Line 1437: printk(BIOS_DEBUG, "%s\n",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/672da662_9c353f41 PS1, Line 1439: printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/088f3e11_b340f046 PS1, Line 1439: printk(BIOS_DEBUG, "%s move to ",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/555973f6_4e6bba27 PS1, Line 1440: dev_mc->path.pci.devfn -= PCI_DEVFN(0x18,0); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/448fb053_e064dfb7 PS1, Line 1441: printk(BIOS_DEBUG, "%s\n",dev_path(dev_mc)); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4089ca10_9fbf1e4d PS1, Line 1503: devn-=32; spaces required around that '-=' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d4a3026c_64905857 PS1, Line 1568: printk(BIOS_DEBUG, " %s siblings=%d\n", dev_path(cdb_dev), cores_found); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/e989799c_75609729 PS1, Line 1575: if (disable_siblings) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4cbb8b07_d2c94c65 PS1, Line 1577: } else that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/44ef8362_0dd76c9c PS1, Line 1582: for (j = 0; j <=jj; j++) { spaces required around that '<=' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/62612687_687285cd PS1, Line 1588: apic_id |= ((i >> 1) & 0x3) << 5; /* Node ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/704e3987_34c75b3d PS1, Line 1589: apic_id |= ((i & 0x1) * (siblings + 1)) + j; /* Core ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1cb9183a_ba396a49 PS1, Line 1592: apic_id |= ((i >> 1) & 0x3) << 4; /* Node ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/74e90627_7212e67f PS1, Line 1593: apic_id |= ((i & 0x1) * (siblings + 1)) + j; /* Core ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/f40ae49f_b225ead1 PS1, Line 1595: apic_id |= i & 0x3; /* Node ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/03d8c1b6_479d3c93 PS1, Line 1596: apic_id |= (((i & 0x1) * (siblings + 1)) + j) << 4; /* Core ID */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/ff32437b_57719d44 PS1, Line 1605: apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:64); // ? line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b83c8dff_24fbb760 PS1, Line 1611: if (apic_id != 0 || sysconf.lift_bsp_apicid) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7d6e034c_cd13d9ea PS1, Line 1667: /* Disable L3 and DRAM scrubbers and configure system for probe filter support */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/718cf6e0_3e8a6de5 PS1, Line 1835: if (compute_unit_count == 1) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/40ae7591_4b4ca0d3 PS1, Line 1911: if (dev->path.type == DEVICE_PATH_DOMAIN) { braces {} are not necessary for any arm of this statement
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1f51ac4e_bc981c25 PS1, Line 1918: static void root_complex_finalize(void *chip_info) { open brace '{' following function definitions go on the next line
File src/southbridge/amd/sb700/chip.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/af5e4848_b30c0d01 PS1, Line 20: { open brace '{' following struct go on the same line
File src/southbridge/amd/sb700/fadt.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/cca78754_e9d58e5d PS1, Line 30: void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) "foo * bar" should be "foo *bar"
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4cb5ca58_5a3a55de PS1, Line 30: void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) "foo * bar" should be "foo *bar"
File src/southbridge/amd/sb700/ramtop.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/3142f414_4ef77f8e PS1, Line 47: xdata |= inb(BIOSRAM_DATA) << (xi *8); need consistent spacing around '*' (ctx:WxV)
File src/southbridge/amd/sb700/reset.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b25105eb_e9c9f213 PS1, Line 28: #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/56b1fed1_5b44b0b1 PS1, Line 28: #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/32bee1cb_1575fc9c PS1, Line 28: #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8bc60cf6_a2ef9fa3 PS1, Line 28: #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/17aa2d98_9400c112 PS1, Line 28: #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0b2b5be2_f8ae673f PS1, Line 30: #define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7f5e683d_45233aca PS1, Line 30: #define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn) space required after that ',' (ctx:VxV)
File src/southbridge/amd/sb700/sb700.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0bdbce90_ae937117 PS1, Line 39: if ((id != that open brace { should be on the previous line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/733942b1_ff72b7c1 PS1, Line 55: if (reg != reg_old) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/a78c0c1e_b07326b0 PS1, Line 99: if (reg != reg_old) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/bb46b569_70f590cc PS1, Line 118: printk(BIOS_DEBUG, "sb7xx_51xx_enable()\n"); Prefer using '"%s...", __func__' to using 'sb7xx_51xx_enable', this function's name, in a string
File src/southbridge/amd/sr5650/chip.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0847fddf_6e3a417a PS1, Line 24: { open brace '{' following struct go on the same line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/fc3e7ed3_ee42e25b PS1, Line 28: u16 port_enable; /* Which port is enabled? GPP(2,3,4,5,6,7,9,10,11,12,13) */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/2d83d470_7337ab4f PS1, Line 29: uint32_t pcie_settling_time; /* How long to wait after link training for PCI-e devices to line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/8cb2530f_ec8a8df2 PS1, Line 30: * initialize before probing PCI-e busses (in microseconds). line over 96 characters
File src/southbridge/amd/sr5650/sr5650.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/b74cf97c_ff2c3dbd PS1, Line 138: struct resource * sr5650_retrieve_cpu_mmio_resource(void); "foo * bar" should be "foo *bar"
File src/southbridge/amd/sr5650/sr5650.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1200726a_0461c006 PS1, Line 64: void pci_ext_write_config32(struct device *nb_dev, struct device *dev, u32 reg_pos, u32 mask, u32 val) line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/0fc39fb5_ed38e80b PS1, Line 78: if (reg != reg_old) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/6e93d2dd_64ac611c PS1, Line 191: /******************************************************************************************************** line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/1de11dcc_dddbc921 PS1, Line 195: ********************************************************************************************************/ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/45feb365_160b6319 PS1, Line 223: udelay(40200); long udelay - prefer mdelay; see arch/arm/include/asm/delay.h
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/792078c2_3da93745 PS1, Line 252: reg = 0xE0E0; /*I think that the lane_mask calc above is wrong, and this can't be hardcoded because the configuration changes.*/ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c12ad576_ed18822c PS1, Line 260: case 0x07: /* device is in compliance state (training sequence is done). Move to train the next device */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/63656f7c_f6169605 PS1, Line 268: printk(BIOS_DEBUG, "PcieTrainPort reg=0x%x\n", reg); Prefer using '"%s...", __func__' to using 'PcieTrainPort', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/94fc6723_a480ca54 PS1, Line 270: if (reg & VC_NEGOTIATION_PENDING) { /* bit1=1 means the link needs to be re-trained. */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/4a7ad29f_aff59f7e PS1, Line 286: /* CIMx Unknown Workaround - There is a device that won't train. Try to reset it. */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/37a71334_ff04d422 PS1, Line 287: /* if there are no device resets and nothing works, CIMx does a cf9 system reset (yikes!) */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/26e5fa13_53bc34bf PS1, Line 322: void detect_and_enable_iommu(struct device *iommu_dev) { open brace '{' following function definitions go on the next line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/7c05e0d4_2bde8275 PS1, Line 539: if (res->base == 0) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/45c96f48_ca79e104 PS1, Line 618: printk(BIOS_INFO, "sr5650_enable: dev=%p, VID_DID=0x%x\n", dev, get_vid_did(dev)); Prefer using '"%s...", __func__' to using 'sr5650_enable', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d8583f01_bc0291fa PS1, Line 621: die("sr5650_enable: CAN NOT FIND SR5650 DEVICE, HALT!\n"); Prefer using '"%s...", __func__' to using 'sr5650_enable', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/cb97a896_87969cf0 PS1, Line 629: die("sr5650_enable: CAN NOT FIND SB bridge, HALT!\n"); Prefer using '"%s...", __func__' to using 'sr5650_enable', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/eb8b88ef_2e38c119 PS1, Line 636: switch (dev->path.pci.devfn & 0x7) { switch and case should be at the same indent
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/84e79972_d136ed79 PS1, Line 661: sr5650_gpp_sb_init(nb_dev, dev, dev_ind); /* Note, dev 2,3 are generic PCIe ports. */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/d651ce97_2519aef2 PS1, Line 692: /* Don't call disable_pcie_bar3(nb_dev) here, otherwise the screen will crash. */ line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/2bb601ad_3243f632 PS1, Line 806: current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, mmconf_base, 0x0, 0x0, 0x1f); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/c41fbd0c_88a11d47 PS1, Line 818: printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 " Prefer using '"%s...", __func__' to using 'acpi_fill_ivrs', this function's name, in a string
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-141247): https://review.coreboot.org/c/coreboot/+/62070/comment/910ffd2a_b4271d92 PS1, Line 825: printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate SR5650 " Prefer using '"%s...", __func__' to using 'acpi_fill_ivrs', this function's name, in a string