Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34988 )
Change subject: mediatek/mt8183: Implement the dramc init setting
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Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34988/2/src/soc/mediatek/mt8183/inc...
File src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h:
https://review.coreboot.org/c/coreboot/+/34988/2/src/soc/mediatek/mt8183/inc...
PS2, Line 119: 0x2
IMHO, they do look like 4-bit register values. […]
Ping HungTe,
DQS_OEN_DELAY_2T and DQS_OEN_DELAY_0P5T were removed in patchset 11. Do you still think we need to name these magic numbers?
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