Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41674 )
Change subject: soc/intel/common/{pch,sata}: Remove SATA common code driver ......................................................................
Patch Set 6:
Patch Set 6:
Patch Set 6:
@Andrey, can you please help me to share the underlying SOCs for those boards.
these are not SoCs, but for "cooperlake-sp" and "skylake-sp" this driver was useful last time I checked. Without it linux kernel would not touch ports since they were disabled (seabios and tianocore did not care if ports were enabled and just used them anyway) Jonathan should be more up-to-date than I am, because I am no longer involved with OCP work
i mean to say if i got to know a SoC/Processor name or ID it would be easy to implement W/A. i had the same issue what u are facing inside Depthcharge AHCI controller code
The IDs can be found in src/soc/intel/xeon_sp/skx/include/soc/cpu.h or src/soc/intel/xeon_sp/cpx/include/soc/cpu.h files. Refer to https://review.coreboot.org/c/coreboot/+/39918 for some contexts. Also: * On my TiogaPass (SKX-SP based), there is SATA drive attached to PCH, it works fine without coreboot SATA driver. * SonoraPass (CPX-SP based) server program was cancelled. My deltalake (CPX-SP based) server does not have SATA drive, so I am not able to verify this.