Hello build bot (Jenkins), Patrick Georgi, Furquan Shaikh, Martin Roth, Duncan Laurie, Sumeet R Pawnikar, Subrata Banik, Patrick Rudolph, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41893
to look at the new patch set (#15).
Change subject: soc/intel/common/block: Add new block DTT ......................................................................
soc/intel/common/block: Add new block DTT
Intel Dynamic Tuning Technology is the name of a PCI device on some Intel SoCs. This minimal PCI driver is only used now for SSDT generation on TGL devices.
Change-Id: Ib52f35e4e020ca3e6ab8b32cc3bf7df36041926e Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/include/device/pci_ids.h A src/soc/intel/common/block/dtt/Kconfig A src/soc/intel/common/block/dtt/Makefile.inc A src/soc/intel/common/block/dtt/dtt.c M src/soc/intel/tigerlake/Kconfig 5 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41893/15