[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp/cpx: Prevent acpi to write invalid drhd

[Christian Walter (Code Review)]

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45950 )

Change subject: soc/intel/xeon_sp/cpx: Prevent acpi to write invalid drhd
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soc/intel/xeon_sp/cpx: Prevent acpi to write invalid drhd

This is only meant as a workaround until I found the core reason.
Currently on CPX one acpi drhd entry will be written with reg_base
equals zero.

Tested on: OCP Deltalake

Change-Id: Ib892aa68e8ebe78b2e917c93d73c18f98ac87c5f
Signed-off-by: Christian Walter 
---
M src/soc/intel/xeon_sp/cpx/acpi.c
1 file changed, 4 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/45950/1

diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c
index cd497c5..df70ddf 100644
--- a/src/soc/intel/xeon_sp/cpx/acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/acpi.c
@@ -665,12 +665,14 @@
    	printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
    		"Register Base Address: 0x%x\n",
    		DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
+			if (reg_base != 0)
+				current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
    		pcie_seg, reg_base);
    } else {
    	printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
    		"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
+		if (reg_base != 0)
+			current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
    }

// Add PCH IOAPIC