Max Blau has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32376 )
Change subject: superio/fintek/f71808a: Add more optional ramstage registers ......................................................................
Patch Set 3: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/32376/2/src/superio/fintek/f71808a/f71808a_m... File src/superio/fintek/f71808a/f71808a_multifunc.c:
https://review.coreboot.org/#/c/32376/2/src/superio/fintek/f71808a/f71808a_m... PS2, Line 36: : if (conf->configuration_port_select_0x27) { : pnp_write_config(dev, CONFIGURATION_PORT_SELECT, : conf->configuration_port_select_0x27); : }
This smells like a recipe for disaster to me. […]
Done
https://review.coreboot.org/#/c/32376/3/src/superio/fintek/f71808a/superio.c File src/superio/fintek/f71808a/superio.c:
https://review.coreboot.org/#/c/32376/3/src/superio/fintek/f71808a/superio.c... PS3, Line 68: 0x07f8, Many Finteks have 0x0ff8 here. I don't understand this mask so if anything's suspicious let me know. Btw, the code layout change here has been done by the clang optimizer.