Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41049 )
Change subject: nb/intel/i440bx: Refactor ACPI code ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/41049/1/src/northbridge/intel/i440b... File src/northbridge/intel/i440bx/acpi/i440bx.asl:
https://review.coreboot.org/c/coreboot/+/41049/1/src/northbridge/intel/i440b... PS1, Line 32: CONFIG_ROM_SIZE, // Address Length
It's indented with spaces, maybe someone mechanically replaced CONFIG_ROM_SIZE aeons ago and then le […]
Ack (file is gone it seems)
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b... File src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl:
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b... PS3, Line 15: ShiftLeft
DRB7 << 23
Done
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b... PS3, Line 62: ShiftLeft(0x10000000, 4, Local0)
Local0 = 0x10000000 << 4
*poke*