[coreboot-gerrit] Change in coreboot[master]: soc/skl/vr_config: add missed Icc max levels

[Maxim Polyakov (Code Review)]

Hello Patrick Rudolph, Angel Pons, Matt DeVillier, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35166

to look at the new patch set (#2).

Change subject: soc/skl/vr_config: add missed Icc max levels
......................................................................

soc/skl/vr_config: add missed Icc max levels

Icc_max for VR domains in Kaby Lake S processors is set based on the
processor TDP [1]. But, according to the DC Current Specifications
for graphics processor [2], Icc_max GT should take several values:

+---------------------+-----+------------+
  |       Segment       | TDP | Icc_max GT |
  +---------------------+-----+------------+
  | Dual Core GT2/GT1   | 35W |            |
  | Dual Core GT2       | 51W |    48 A    |
  | Dual Core GT1       | 54W |            |
  +---------------------+-----+------------+
  | Quad Core GT2       | 35W |    35 A    |
  +---------------------+-----+------------+
  | Quad Core GT2       | 65W |    45 A    |
  | Quad Core GT2 K-SKU | 91W |            |
  +---------------------+-----+------------+

This patch add missing current limits for a corresponding graphical
VR domain

[1] Change-Id: I303c5dc8ed03e9a98a834a2acfb400022dfc2fde
[2] 7th Generation Intel(R) Processor Families for S Platforms and
    Intel(R) Core(TM) X-Series Processor Family Datasheet, Volume 1,
    December 2018, Document Number: 335195-003

Change-Id: I19766e4f8fab6b48565b65ed4cf13efbc213e654
Signed-off-by: Maxim Polyakov 
---
M src/soc/intel/skylake/vr_config.c
1 file changed, 13 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/35166/2