[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Remove unused ASL debug options

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36466 )

Change subject: soc/intel/skylake: Remove unused ASL debug options
......................................................................

soc/intel/skylake: Remove unused ASL debug options

This patch removes unused TRAP, Port 80 debug options carried
from previous platform (BDW).

Change-Id: I91ccb24a7f08f9a19f6e3a7609c8f43776700a4e
Signed-off-by: Subrata Banik 
---
M src/soc/intel/skylake/acpi/platform.asl
1 file changed, 0 insertions(+), 26 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/36466/1

diff --git a/src/soc/intel/skylake/acpi/platform.asl b/src/soc/intel/skylake/acpi/platform.asl
index 19345b2..36c3ae3 100644
--- a/src/soc/intel/skylake/acpi/platform.asl
+++ b/src/soc/intel/skylake/acpi/platform.asl
@@ -18,32 +18,6 @@
 /* Enable ACPI _SWS methods */
 #include <soc/intel/common/acpi/acpi_wake_source.asl>

-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
-	DBG0, 8
-}
-
-/* IO-Trap at 0x800.
- * This is the ACPI->SMI communication interface.
- */
-OperationRegion (IO_T, SystemIO, 0x800, 0x10)
-Field (IO_T, ByteAcc, NoLock, Preserve)
-{
-	Offset (0x8),
-	TRP0, 8		/* IO-Trap at 0x808 */
-}
-
-/* SMI I/O Trap */
-Method (TRAP, 1, Serialized)
-{
-	Store (Arg0, SMIF)	// SMI Function
-	Store (0, TRP0)		// Generate trap
-	Return (SMIF)		// Return value of SMI handler
-}
-
 /*
  * The _PIC method is called by the OS to choose between interrupt
  * routing via the i8259 interrupt controller or the APIC.