Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37865 )
Change subject: mb/google/hatch: Program gpio clk power gating settings in SPI0 PS3/PS0 ......................................................................
Patch Set 4:
Patch Set 4:
Patch Set 4:
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Patch Set 4: Code-Review-1
There's no guarantee that SPI0 is the last device to enter S0ix and the first device to wake up from S0ix, hence this could cause races where other IRQs are missed.
As per Kane, this is must for runtime S0ix, can i suggest to do the same in GFX0 _PS0/_PS3 as GFX would be last device to enter into low power mode in runtime S0ix. I have enable ACPI debug to verify the same.
hi Subrata, to be more accurate. runtime s0ix is still working on tot now since i reverted PchPmSlpS0Vm075VSupport on tot .
This change is needed for runtime s0ix only when PchPmSlpS0Vm075VSupport is set thanks
Yes Kane, agree.
Can you please move this W/A into GFX _PS0/_PS3 and run few cycle ?
hmmm, I think putting this WA under any device's _PS0/_PS3 still can't make it solid. I guess it would be better to put the WA under device whose interrupt is missed. And for sure, there will be new devices in the future and it might be impacted.