Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32992 )
Change subject: soc/intel/cannonlake: Add ability to disable Heci1 ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/32992/4/src/soc/intel/cannonlake/chip.h File src/soc/intel/cannonlake/chip.h:
https://review.coreboot.org/#/c/32992/4/src/soc/intel/cannonlake/chip.h@216 PS4, Line 216: /* HeciEnabled decides the state of Heci1 at end of boot : * Setting to 0 (default) disables Heci1 and hides the device from OS */ : uint8_t HeciEnabled;
In my opinion we should get rid of the SMM way of disabling HECI and just use the FSP UPD.
I will fix this today, this UPD is not added for all platform so far, for an example: right now UPD is enable on WHL and CML where SMM mode won't have IOSF access. CNL and ICL still relies on SMM mode. i will add CONFIG for now to skip as we have common code for CNL, WHl and CML