Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40291 )
Change subject: vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles ......................................................................
Patch Set 17:
Patch Set 13:
Meanwhile I'll try to get ASUS A88XM-E with A10-6700 working: yesterday when I tried to enable "XMP 1" 1866MHz profile on it, maybe it trained to 1866MHz as requested (since f15tn A10-6700 's memory controller really supports 1866MHz without overclocking) but I got a weird exception which prevented the successful booting:
... PCI: 00:18.5 Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1417 ms
APIC 00: ** Enter AmdInitMid [00020005] Timestamp - calling AmdInitMid: 24619341360 CPU Index 0 - APIC 16 Unexpected Exception:0 @ 10:1febbe1d - Halting Code: 0 eflags: 00010046 cr2: 00000000 eax: 00017318 ebx: 10000660 ecx: 00000004 edx: 00000000 edi: 00000000 esi: 0000014d ebp: 00000016 esp: 1fedec70
0x1febbdd8: c7 5e ff 33 8a 44 24 4b 0x1febbde0: 83 e0 1f 50 e8 b0 13 00 0x1febbde8: 00 83 c4 10 89 c6 83 ec 0x1febbdf0: 0c ff 33 6a 00 8d 44 24 0x1febbdf8: 38 50 68 70 01 00 00 6a 0x1febbe00: 0f e8 b3 26 00 00 83 c4 0x1febbe08: 14 80 7c 24 33 00 ff 33 0x1febbe10: 0f 48 f7 e8 c3 13 00 00 0x1febbe18: 6b c0 64 31 d2 f7 f7 89 0x1febbe20: 44 24 14 5f ff 33 e8 b0 0x1febbe28: 13 00 00 6b c0 64 31 d2 0x1febbe30: f7 f6 89 c5 58 ff 33 6a 0x1febbe38: 00 8d 44 24 24 50 68 74 0x1febbe40: 27 00 00 6a 12 e8 6f 26 0x1febbe48: 00 00 83 c4 14 ff 33 6a 0x1febbe50: 00 8d 44 24 28 50 68 78
It's related to issue in thread https://mail.coreboot.org/pipermail/coreboot/2014-March/077418.html - ariphmetic (division?) error at ./src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxGmcInitTN.c - line 334 - which happens only if RAM frequency is 1866MHz! When I forced a 1600MHz by changing "#define BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT DDR1866_FREQUENCY" to DDR1600_FREQUENCY at ./src/mainboard/asus/a88xm-e/buildOpts.c , a board booted fine. So need to investigate if it's something as simple as changing i.e. memps0_freq from 0 to 1, or everything is tied to the hardcoded values and hardly fixable. At least the 1600MHz timings are good enough in case I would fail.