Hello Patrick Rudolph, Paul Fagerburg, Subrata Banik, Tim Wawrzynczak, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32513
to look at the new patch set (#9).
Change subject: soc/intel/cannonlake: Support different SPD read type for each slot ......................................................................
soc/intel/cannonlake: Support different SPD read type for each slot
Also clean up cannonlake_memcfg_init.
The major changes include: (1) Add enum 'mem_info_read_type' to spd_info. (2) Add per-dimm-slot spd_info to cnl_mb_cfg. (3) Setup memory config for each slot independently. (4) Squash meminit_memcfg_spd().
BUG=chromium:960581, b:124990009 BRANCH=none TEST=none
Change-Id: I686a85996858204c20fd05ef24787a0487817c34 Signed-off-by: Philip Chen philipchen@google.com --- M src/mainboard/google/hatch/romstage.c M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/hatch/variants/baseboard/memory.c M src/mainboard/google/hatch/variants/kohaku/memory.c M src/mainboard/google/sarien/romstage.c M src/mainboard/intel/coffeelake_rvp/memory.c M src/mainboard/intel/coffeelake_rvp/romstage.c M src/soc/intel/cannonlake/cnl_memcfg_init.c M src/soc/intel/cannonlake/include/soc/cnl_memcfg_init.h 10 files changed, 169 insertions(+), 161 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/32513/9