Attention is currently required from: Andrey Petrov, Patrick Rudolph. Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50916 )
Change subject: soc/intel/apollolake: Add `GPE0_STS_BIT` macro ......................................................................
soc/intel/apollolake: Add `GPE0_STS_BIT` macro
The datasheet indicates that this bit is reserved. However, subsequent patches need to use this macro in common code, or else builds fail.
Change-Id: Ib4408e016ba29cf8f7b125c95bfa668136b9eb93 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/apollolake/include/soc/pm.h 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/50916/1
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 748f76a..c89bd18 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -108,6 +108,7 @@ #define MC_SMI_STS_BIT 12 #define GPIO_UNLOCK_SMI_STS_BIT 11 #define GPIO_STS_BIT 10 +#define GPE0_STS_BIT 9 /* Datasheet says this is reserved */ #define PM1_STS_BIT 8 #define SWSMI_TMR_STS_BIT 6 #define APM_STS_BIT 5